GS9020 Datasheet, PDF (16/30 Pages) List of Unclassifed Manufacturers – Serial Digital Video Input Processor

• TRS Insertion, and
• ANC Header updating
It is important to note that these processing functions occur
in the GS9020 in the order listed above.
When implementing applications which use the EDH core
(ie. BYPASS_EDH set LOW), TRS blanking, data blanking,
and TRS insertion will indicate a downstream FF/AP EDH
error when a 3FC_H-3FF_H input data value is blanked out or
overwritten to a value less than 3FB_H. As such, users may
wish to disable data blanking, TRS blanking and TRS
insertion by setting the BLANK_EN pin HIGH, the CLIP_TRS
pin LOW, and leaving the corresponding host interface bits
at their power-on default values when implementing
applications which use the EDH core.
4.1 TRS Blanking
PIN
LOGIC OPR
HOST BIT
TRS_BLANK
4.3 Data Blanking
PIN
BLANK_EN
LOGIC OPR
AND
HOST BIT
BLANK_EN
Asserting the BLANK_EN pin or the corresponding HOSTIF
write table bit LOW causes the corresponding input data to
be forced to blanking levels. This is a dynamic control
allowing the user to individually select which data words are
to be blanked. TRS and EDH insertion occurs after data
blanking so if all these features are being used, the output
data stream continues to have TRS words and EDH packets
present, even if the BLANK_EN is constantly held LOW.
The outgoing EDH packet will contain the correct CRC
values for the blanked fields since the CRC values are
calculated and inserted just prior to the data exiting the
device.
The blanking values in hexi-decimal notation for each
standard are as follows:
When asserted HIGH, TRS_BLANK (HOSTIF write table) will
blank out any incorrectly positioned TRS words with respect
to the flywheel. The blanking values used will be
appropriate for the detected video standard as described
below in the Data Blanking section. When TRS_INSERT is
enabled and TRS_BLANK is not, there may be 4 TRSs per
line in the outgoing data stream during a standard switch.
Similarly, if TRS_BLANK is enabled and TRS_INSERT is not,
then there may be 0 TRS per line during a switch. In most
applications, these features should be either both enabled
or both disabled to maintain only two TRSs per line. TRS
blanking will function incorrectly if the flywheel is disabled.
Thus if the flywheel is disabled the TRS_BLANK function
should be disabled as well.
4.2 ITU-R-601 Clipping
NTSC/PAL 4:2:2
NTSC 4ƒsc
PAL 4ƒsc
NTSC/PAL 4:4:4:4
200 040 200 040 (CB:Y:CR:Y)
0F0
100
040 040 040 040 (B:G:R:A)
200 040 200 040 (CB:Y:CR:A)
Note that the device must first detect the incoming standard
in order for the proper blanking values to be inserted.
4.4 TRS Insertion
PIN
LOGIC OPR
HOST BIT
TRS_INSERT
PIN
LOGIC OPR
HOST BIT
601_CLIP
This feature operates on the active picture portion (as
defined in RP165) of the data stream only. When the
601_CLIP bit of the HOSTIF write table is asserted HIGH,
the device remaps all reserved data words in the active
picture to values compliant with ITU-R-601. That is, 000-003
is clipped to 004 and 3FC_H-3FF_H is clipped to 3FB_H.
TRS words, based on the internal flywheel, can be inserted
into the outgoing data stream by asserting HIGH the
TRS_INSERT bit of the HOSTIF write table. Note that for
proper TRS insertion, the incoming standard must be
detected and the flywheel synchronized. That is, the
GS9020 does NOT provide proper TRS insertion for
unformatted video data (video without TRS words).
In the case where the input signal disappears, TRSs will
continue to be inserted based on the last detected
standard. Further, if a TRS is already in the correct location,
it will be overwritten which may have the effect of correcting
the TRS-ID word.
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