CX28342 Datasheet, PDF (156/195 Pages) List of Unclassifed Manufacturers – Dual/Triple/Quad/Hex/Octal-Enhanced DS3/E3 Framer

Registers
CX28342/3/4/6/8 Data Sheet
7
FerrCtr[7]
DS3/E3 Frame Error Counter (Ctr03i)
6
FerrCtr[6]
5
FerrCtr[5]
4
FerrCtr[4]
3
FerrCtr[3]
2
FerrCtr[2]
1
FerrCtr[1]
0
FerrCtr[0]
15
FerrCtr[15]
14
FerrCtr[14]
13
FerrCtr[13]
12
FerrCtr[12]
11
FerrCtr[11]
10
FerrCtr[10]
9
FerrCtr[9]
8
FerrCtr[8]
Value after reset: 0000(h)
Direction: Read/Write
Value after enable: 0000(h)
FerrCtr[15:0]
Frame Error Counter—The counter increments for each error in the M- or F-bit framing
pattern in DS3 mode and for each error in the FAS/FA pattern in E3 mode. Errors are still
counted during an OOF condition (OOFAlm = 1).
DS3 Path Parity Error Counter (Ctr04i)
7
6
5
4
3
2
1
0
DS3PthCtr[7] DS3PthCtr[6] DS3PthCtr[5] DS3PthCtr[4] DS3PthCtr[3] DS3PthCtr[2] DS3PthCtr[1] DS3PthCtr[0]
15
14
13
12
11
10
9
8
DS3PthCtr[15] DS3PthCtr[14] DS3PthCtr[13] DS3PthCtr[12] DS3PthCtr[11] DS3PthCtr[10] DS3PthCtr[9] DS3PthCt[8]
Value after reset: 0000(h)
Direction: Read/Write
Value after enable: 0000(h)
DS3PthCtr[15:0]
DS3 Path Parity Error Counter—Increments the count for each M-frame in which the
calculated parity of the received data bits of the previous M-frame do not match a majority
vote of the three received CP-bits (C-bits in subframe 3).
3-44
Mindspeed Technologies™
28348-DSH-001-B