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GS8320Z36T-166 Datasheet, PDF (15/24 Pages) List of Unclassifed Manufacturers – 36Mb Pipelined and Flow Through Synchronous NBT SRAM
Preliminary
GS8320Z18/36T-250/225/200/166/150/133
Undershoot Measurement and Timing
VIH
VSS
50%
VSS – 2.0 V
20% tKC
Capacitance
(TA = 25oC, f = 1 MHZ, VDD = 2.5 V)
Parameter
Symbol
Input Capacitance
CIN
Input/Output Capacitance
CI/O
Note:
These parameters are sample tested.
Overshoot Measurement and Timing
VDD + 2.0 V
50%
20% tKC
VDD
VIL
Test conditions
VIN = 0 V
VOUT = 0 V
Typ. Max. Unit
4
5
pF
6
7
pF
AC Test Conditions
Parameter
Conditions
Input high level
VDD – 0.2 V
Input low level
0.2 V
Input slew rate
1 V/ns
Input reference level
VDDQ/2
Output reference level
VDDQ/2
Output load
Fig. 1
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Device is deselected as defined by the Truth Table.
Output Load 1
DQ
50Ω
30pF*
VDDQ/2
* Distributed Test Jig Capacitance
Rev: 1.03 10/2004
15/24
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, GSI Technology