AAT1140 Datasheet, PDF (15/19 Pages) Advanced Analogic Technologies – Fast Transient 600mA Step-Down Converter

SwitchReg^TM
PRODUCT DATASHEET
AAT1140
Fast Transient 600mA Step-Down Converter
Efficiency
Besides the AAT1140 device losses including switching
losses, conduction losses, and quiescent current losses,
the inductor copper loss also affects the efficiency of the
buck converter. To the buck converter, the average cur-
rent of the inductor is equal to output current I_O. So the
loss in the inductor is:
P_{LOSS_L} = I_O2 · R_L
Table 4 shows some recommended inductors. A larger
size inductor usually has smaller DCR. As a example: if
selecting CDRH2D14 4.7μH for 1.8V output, the P_{Loss_L} is
48.6mW when output current is 600mA, so the inductor
loses 4.5% power; if selecting CDRH3D23 4.7μH, the
P_{Loss_L} should be 19.8mW, and the inductor losing power
ratio is only 1.8%. The inductor size and the buck con-
verter efficiency is always a trade-off in the real applica-
tion.
Layout
The suggested 2-layer PCB layout for the AAT1140 is
shown in Figures 2, 3 and 4. The following guide lines
should be used to help ensure a proper layout.
1. The power traces (GND, LX, VIN) should be kept
short, direct, and wide to allow large current flow.
Place sufficient multiple-layer pads when needed to
change the trace layer.
2. The input capacitor (C1) should connect as closely
as possible to IN and GND.
3. The output capacitor C2 and L1 should be connected
as closely as possible. The connection of L1 to the LX
pin should be as short as possible and there should
not be any signal lines under the inductor.
4. The feedback trace or OUT pin should be separate
from any power trace and connect as closely as pos-
sible to the load point. Sensing along a high-current
load trace will degrade DC load regulation. If exter-
nal feedback resistors are used, they should be
placed as closely as possible to the OUT pin to min-
imize the length of the high impedance feedback
trace.
5. The resistance of the trace from the load return to
GND should be kept to a minimum. This will help to
minimize any error in DC regulation due to differ-
ences in the potential of the internal signal ground
and the power ground.
1140.2007.12.1.1
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