TXC-02050C Datasheet, PDF (14/36 Pages) List of Unclassifed Manufacturers – MRT Device 6-,8-,34-Mbit Line Interface TXC-0250C

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DATA SHEET
MRT
TXC-02050C
TIMING CHARACTERISTICS
Detailed timing diagrams for the MRT are illustrated in Figures 3 through 9. All output times are measured with
maximum load capacitance appropriate for the pin type. Timing parameters are measured at voltage levels of
(V_IH + V_IL)/2 for input signals or (V_OH + V_OL)/2 for output signals.
Line Side Timing Characteristics
The line side timing characteristics of the MRT are designed so that the line output at the transformer output
meets the pulse shapes specified in ITU-T Rec. G.703 for 34 and 8 Mbit/s operation and the NTT Technical
Reference for High-Speed Digital Leased Circuit Services for 6 Mbit/s operation. The pulse masks for each of
the three modes of operation are shown in Figures 3, 4, and . Refer to the corresponding standard cited in
each case for further details regarding the interface. The output circuits to be used are shown in Figures 12, 13
and 14.
17 ns
(14.55 + 2.45)
V
1.0
8.65 ns
(14.55 - 5.90)
Nominal pulse
14.55 ns
0.5
12.1 ns
(14.55 - 2.45)
24.5 ns
(14.55 + 9.95)
0
29.1 ns
(14.55 + 14.55)
Reference: ITU-T Recommendation G.703
Figure 3. Pulse Mask at the 34368 kbit/s Interface
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TXC-02050C-MB
Ed. 1, May 2002