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SPLC783A Datasheet, PDF (14/38 Pages) List of Unclassifed Manufacturers – 16COM/80SEG Controller/Driver
SPLC783A
5.8. Display Data RAM (DD RAM)
The 80-bit DD RAM is normally used for storing display data.
Those DD RAM not used for display data can be used as general
data RAM. Its address is configured in the Address Counter.
The relationships between Display Data RAM Address and LCDs
position are depicted as follows.
1-line display , 80 display characters
1 234 56
79 80
Display position
00 01 02 03 04 05
4E 4F
Display data RAM
address
( Example ) 1-line display , 8 display characters
l 1 2 3 4 5 6 7 8
tia ly 00 01 02 03 04 05 06 07
Display position
Display data RAM
address
n n When the display shift operation is performed , the display data RAM's address moves as :
e O ( i ) Left shift
( ii ) Right shift
fid e 01 02 03 04 05 06 06 07 08
4F 00 01 02 03 04 05 06
on Us 5.9. Timing Generation Circuit
The timing generating circuit is able to generate timing signals to
C R the internal circuits. In order to prevent the internal timing
s E interface, the MPU access timing and the RAM access timing are
lu generated independently.
5.11. Character Generator ROM (CG ROM)
Using 8-bit character code, the character generator ROM
generates 5 x 8 dots or 5 x 10 dots character patterns. It also
can generate 192’s 5 x 8 dots character patterns and 64’s 5 x 10
dots character patterns.
p IN 5.10. LCD Driver Circuit
n M Total of 16 commons and 80 segments signal drivers are valid in
u T the LCD driver circuit. When a program specifies the character
fonts and line numbers, the corresponding common signals output
FSor PAR drive-waveforms and the others still output unselected waveforms.
5.12. Character Generator RAM (CG RAM)
Users can easily change the character patterns in the character
generator RAM through program. It can be written to 5 x 8 dots,
8-character patterns or 5 x 10 dots for 4-character patterns.
© Sunplus Technology Co., Ltd.
14
Proprietary & Confidential
MAR. 10, 2005
Version: 1.4