EM42AM3284LBA Datasheet, PDF (14/20 Pages) List of Unclassifed Manufacturers – 512Mb (4M×4Bank×32) Double DATA RATE SDRAM

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EM42AM3284LBA
4. Command Truth Table for CKE
Current State
Self Refresh
Both bank
precharge
power down
All Banks
Idle
CKE
n-1 n
HX
LH
LH
LH
LH
LH
LL
HX
LH
LH
LH
LH
LH
LL
HH
HL
HL
HL
HL
HL
HL
HL
HL
/CS /R /C /W Addr.
Action
X XX X
H XX X
L HH H
L HH L
L HL X
L LXX
X XX X
X XX X
H XX X
L HH H
L HH L
L HL X
L LXX
X XX X
X XX X
H XX X
L HH H
X
INVALID
X
Exist Self-Refresh
X
Exist Self-Refresh
X
ILLEGAL
X
ILLEGAL
X
ILLEGAL
X
NOP(Maintain self refresh)
X
INVALID
X
Exist Power down
X
Exist Power down
X
ILLEGAL
X
ILLEGAL
X
ILLEGAL
X
NOP(Maintain Power down)
X
Refer to function true table
X
Enter power down mode^{(Note 3)}
X
Enter power down mode^{(Note 3)}
L HH L
L HL X
L LHH
L LLH
X
ILLEGAL
X
ILLEGAL
RA Row active/Bank active
X
Enter self-refresh^{(Note 3)}
L L L L Op-Code Mode register access
L L L L Op-Code Special mode register access
L X X XX X
X
Refer to current state
Any State Other
than Listed above
HH
X XX X
X
Refer to command truth table
Remark: H = High level, L = Low level, X = High or Low level (Don't care)
Notes 1: After CKE’s low to high transition to exist self refresh mode.And a time of tRC(min) has to be
Elapse after CKE’s low to high transition to issue a new command.
Notes 2:CKE low to high transition is asynchronous as if restarts internal clock.
Notes 3:Power down and self refresh can be entered only from the idle state of all banks.
Jul. 2006
14/20
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