SI3016 Datasheet, PDF (13/48 Pages) List of Unclassifed Manufacturers – 3.3 V ENHANCED GLOBAL DIRECT ACCESS ARRANGEMENT

Si3016
Table 9. Country Specific Register Settings
Register
Country
16
17
18
OHS ACT DCT[1:0] RZ
RT
LIM
VOL
Spain
Sweden
Switzerland
Syria¹
Taiwan¹
Thailand¹
UAE
United Kingdom
USA
Yemen
0
0 or 1
11
0
0
1
0
0
0 or 1
11
0
0
1
0
0
0 or 1
11
0
0
1
0
0
0
01
0
0
0
0
0
0
01
0
0
0
0
0
0
01
0
0
0
0
0
0
10
0
0
0
0
0
0 or 1
11
0
0
1
0
0
0
10
0
0
0
0
0
0
10
0
0
0
0
Notes:
1. See "DC Termination Considerations" on page 17 for more information.
2. CTR21 includes the following countries: Austria, Belgium, Denmark, Finland, France, Germany, Greece,
Iceland, Ireland, Italy, Luxembourg, Netherlands, Norway, Portugal, Spain, Sweden, Switzerland, and the
United Kingdom.
3. Supported for loop current ≥ 20 mA.
Initialization
When the integrated system-side module and the
Si3016 are initially powered up, the DAA registers will
have default values that guarantee the line-side chip
(Si3016) is powered down with no possibility of loading
the line (i.e., off-hook). An example initialization
procedure is outlined below:
1. Program the desired sample rate with the Sample Rate
Control Register.
2. Wait until the Si3016 PLL is locked. This time is between
100 µs and 1 ms.
3. Write a 00H into the DAA Control 2 Register. This powers
up the line-side chip (Si3016), and enables the AOUT for
call progress monitoring.
4. Set the desired line interface parameters (i.e., DCT[1:0],
ACT, OHS, RT, LIM[1:0], and VOL) as defined by “Country
Specific Register Settings” shown in Table 9.
After this procedure is complete, the Si3016 is ready for
ring detection and off-hook.
Power Supply
When on-hook, the Si3016 draws power across the
isolation link from the system-side module. When off-
hook, power is drawn from the 2-wire line. Thus, no
power supply connections are needed for the Si3016.
Isolation Barrier
The Si3016 achieves an isolation barrier through low-
cost, high-voltage capacitors in conjunction with Silicon
Laboratories’ proprietary ISOcap signal processing
techniques. These techniques eliminate any signal
degradation due to capacitor mismatches, common
mode interference, or noise coupling. As shown in
Figure 6 on page 9, the C1, C4, C24, and C25 capacitors
isolate the system-side from the Si3016 (line-side). All
transmit, receive, control, ring detect, and caller ID data
are communicated through this barrier.
The ISOcap communications link is disabled by default.
To enable it, the PDL bit must be cleared. No
communication between the system-side module and
the Si3016 can occur until this bit is cleared. When the
PDL bit is cleared, a check is performed to ensure the
line-side device is a Si3016 device. If it is not, the
system-side module will not function.
Transmit/Receive Full Scale Level
The Si3016 supports programmable maximum transmit
and receive levels. The full scale TX/RX level is
established by writing the FULL bit in Register 18. With
FULL = 1, the full scale TX/RX level is increased to
3.2 dBm to support certain FCC voice applications
which require higher TX/RX levels. When FULL = 1, R2
must be changed from 402 Ω to 243 Ω. The default full
scale value is –1 dBm (FULL = 0). Note that this higher
TX/RX full scale mode must be used in FCC/600 Ω
termination mode.
Parallel Handset Detection
The Si3016 is capable of detecting a parallel handset
going off-hook. When the Si3016 is off-hook, the loop
14
Rev. 0.44