QL8X12B Datasheet, PDF (12/16 Pages) List of Unclassifed Manufacturers – Military 5.0V pASIC 1 Family - Very-High-Speed CMOS FPGA

Military 5.0V pASIC 1 Family
Symbol
tIN
tINI
High Drive Buffer
Parameter
High Drive Input Delay
High Drive Input,
Inverting Delay
Clock Drivers
Wired Together
1
2
3
4
1
2
3
4
Propagation Delays (ns) [4]
Fanout
12 24 48 72 96
4.5 5.4
3.9 5.6
4.5 5.3 6.3
4.6 5.3
4.7 5.6
4.0 5.8
4.6 5.5 6.4
4.8 5.5
[4] Stated timing for worst case Propagation Delay over process variation at VCC = 5.0V and TA = 25°C.
Multiply by the appropriate Delay Factor, K, for speed grade, voltage and temperature settings as
specified in the Operating Range.
8-18
18
Preliminary