LM3S328_06 Datasheet, PDF (11/359 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S328 Data Sheet
Register 5:
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Register 18:
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Register 20:
Register 21:
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Register 28:
Register 29:
Register 30:
GPIO Interrupt Event (GPIOIEV), offset 0x40C....................................................................... 115
GPIO Interrupt Mask (GPIOIM), offset 0x410.......................................................................... 116
GPIO Raw Interrupt Status (GPIORIS), offset 0x414.............................................................. 117
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ........................................................ 118
GPIO Interrupt Clear (GPIOICR), offset 0x41C....................................................................... 119
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ................................................. 120
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500.............................................................. 121
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504.............................................................. 122
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508.............................................................. 123
GPIO Open Drain Select (GPIOODR), offset 0x50C............................................................... 124
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ...................................................................... 125
GPIO Pull-Down Select (GPIOPDR), offset 0x514.................................................................. 126
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518...................................................... 127
GPIO Digital Input Enable (GPIODEN), offset 0x51C ............................................................. 128
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ........................................... 129
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ........................................... 130
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ........................................... 131
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC........................................... 132
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ........................................... 133
GPIO Peripheral Identification 1(GPIOPeriphID1), offset 0xFE4 ............................................ 134
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ........................................... 135
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC........................................... 136
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .............................................. 137
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .............................................. 138
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .............................................. 139
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC.............................................. 140
General-Purpose Timers .............................................................................................................. 141
Register 1: GPTM Configuration (GPTMCFG), offset 0x000..................................................................... 153
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 .................................................................. 154
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 .................................................................. 155
Register 4: GPTM Control (GPTMCTL), offset 0x00C............................................................................... 156
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .................................................................... 158
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C .......................................................... 160
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ..................................................... 161
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024..................................................................... 162
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ...................................................... 163
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C...................................................... 164
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ....................................................... 165
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 ....................................................... 166
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038.............................................................. 167
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ............................................................. 168
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040................................................ 169
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044................................................ 170
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ............................................................................... 171
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C .............................................................................. 172
Watchdog Timer............................................................................................................................ 173
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ............................................................................ 176
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ......................................................................... 177
October 8, 2006
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Preliminary