TTS3816B4E Datasheet, PDF (1/8 Pages) List of Unclassifed Manufacturers – 2M x 16Bit x 4 Banks synchronous DRAM

M.tec
2M x 16Bit x 4 Banks synchronous DRAM
TTS3816B4E
GENERAL DESCRIPTION
The TTS3816B4E is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 8 x 1,048,576 words by 16 bits,
fabricated with M’tec high performance CMOS technology. Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system
applications.
FEATURES
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four-banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (4K cycle)
ORDERING INFORMATION
Part No.
TTS3816B4E-7
TTS3816B4E-6
TTS3816B4E-6A
TTS3816B4E-6B
TTS3816B4E-6C
TTS3816B4E-6D
TTS3816B4E-6E
Max Freq.
100MHz 2-2-2
133MHz 3-3-3
100MHz 2-3-3
133MHz 2-3-2
133MHz 2-2-2
150MHz 3-3-3
166MHz 3-3-3
Interface
Package
LVTTL
54
TSOP(II)
Revision_1.1
1 TwinMOS Technologies Inc. Sep. 2000