TFG-756DVX7 Datasheet, PDF (1/1 Pages) List of Unclassifed Manufacturers – Crystal Clock Oscillator

Crystal Clock Oscillator
TFG-756DVX7
FULL DIP Double-Sealed VCXO
Features
CMOS logic output
DIP-14 pin package compatible
Hermetically double-sealed metal package
Voltage controlled oscillator
Specifications
Absolute Maximum Ratings
Parameter
Symbol
Rating
Supply voltage
Vcc
-0.5 to +7.0 V
Input voltage
VIN
-0.5 to Vcc+0.5 V
Output voltage
VO
-0.5 to Vcc+0.5 V
Output current
IO
±20 mA
Storage temperature Tstg
-40 to +85 °C
Parameter
TFG-756DVX7
Conditions
Frequency
Frequency Stability
Pullability
Control Voltage Range
Operating Temperature
Supply Voltage
Supply Current
Output Voltage
Symmetry
fo
Δf/fo
Vcont
Topr
Vcc
Icc
V_OH
VOL
SYM
40 to 100 MHz
±50 ppm max.
±150 ppm min.
+2.5 V ±2.5V
0 °C to +70 °C
+5.0 V ±5%
See Table A (max.)
V_OH=Vcc-0.5 V min. / V_OL=+0.5 V max.
40 to 60 %
(*1)
at Vcont=0 to +5.0V, Ref=+2.5 V
DC, Pin #1
DC, Pin #14
Vcc=+5.25V
IOH=-4mA Pin #8
I_OL=+4mA
at 50% Vcc
Rise/Fall time
tr/tf
See Table A (max.)
Load Capacitance
Start-up time
CL
30 pF max.
tst
4 ms max.
*1 Inclusive of calibration tolerance at +25°C, operating temperature, operating voltage range.
*2 Rise time (0 to +4.75V) of Vcc >150μs
at 20% to 80% Vcc
Package Outlines [Dimensions in mm]
20.8 max.
Marking
ø0.46
#1
0.79
12.19
TOYOCOM
MHz
JAPAN
Model
Solder dip
Frequency
Date Code
Denotes Pin #1 Location
#7
#14
15.24
#8
Pin
CONNECTION
#1
CONTROL VOLTAGE
#7
GND/case
#8
Output
#14
Vcc DC
Table A
Freq. 40 ≤ fo 60 < fo
(MHz) fo ≤ 60 fo ≤ 100
Icc
(mA)
50
60
tr,tf
(ns)
4
3
Test Circuit
See Test Circuit page TEST-7
(2001. 2.)