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| STK14C88-3 Datasheet, PDF (1/13 Pages) List of Unclassifed Manufacturers – 32K x 8 AutoStore™ nvSRAM QuantumTrap CMOS Nonvolatile StaticRAM | |||
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STK14C88-3
32K x 8 AutoStore⢠nvSRAM
QuantumTrap⢠CMOS
Nonvolatile Static RAM
FEATURES
⢠35ns, 45ns and 55ns Access Times
⢠âHands-offâ Automatic STORE with External
68µF Capacitor on Power Down
⢠STORE to nonvolatile elements Initiated by
Hardware, Software or AutoStoreâ¢
⢠RECALL to SRAM Initiated by Software or
Power Restore
⢠10mA Typical ICC at 200ns Cycle Time
⢠Unlimited READ, WRITE and RECALL Cycles
⢠1,000,000 STORE Cycles to nonvolatile ele-
ments (Commercial/Industrial)
⢠100-Year Data Retention in nonvolatile ele-
ments (Commercial/Industrial)
⢠Single 3.3V + 0.3V Operation
⢠Commercial and Industrial Temperatures
⢠32-Pin SOIC and DIP Packages
DESCRIPTION
The Simtek STK14C88-3 is a fast static RAM with a
nonvolatile element incorporated in each static
memory cell. The SRAM can be read and written an
unlimited number of times, while independent, non-
volatile data resides in nonvolatile elements. Data
transfers from the SRAM to the nonvolatile elements
(the STORE operation) can take place automatically
on power down. A 68µF or larger capacitor tied from
VCAP to ground guarantees the STORE operation,
regardless of power-down slew rate or loss of power
from âhot swappingâ. Transfers from the nonvolatile
elements to the SRAM (the RECALL operation) take
place automatically on restoration of power. Initia-
tion of STORE and RECALL cycles can also be soft-
ware controlled by entering specific read
sequences. A hardware STORE may be initiated with
the HSB pin.
BLOCK DIAGRAM
A5
A6
A7
A8
A9
A11
A12
A13
A14
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
Quantum Trap
512 x 512
STATIC RAM
ARRAY
512 x 512
STORE
RECALL
COLUMN I/O
COLUMN DEC
A0 A1 A2 A3 A4 A10
VCCX VCAP
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
A0 - A13
G
E
W
PIN CONFIGURATIONS
VCAP 1
A14 2
A12 3
A7 4
A6 5
A5 6
A4 7
A3 8
NC 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
32 VCCX
31 HSB
30 W
29 A13
28 A8
27 A9
26 A11
25 G
24 NC
23 A10
22 E
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
PIN NAMES
A0 - A14
Address
Inputs
DQ0 -DQ7
Data In/Out
E
Chip
Enable
W
Write
Enable
G
Output
Enable
HSB
Hardware
Store
Busy (I/O)
VCCX
Power
(+ 3.3V)
32 - DIP
32 - SOIC
VCAP
Capacitor
VSS
Ground
48 - SSOP
(not to scale)
November 2003
1 Document Control # ML0015 rev 0.3
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