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| STK12C68 Datasheet, PDF (1/13 Pages) List of Unclassifed Manufacturers – 8K x 8 AutoStore™ nvSRAM QuantumTrap™ CMOS Nonvolatile Static RAM | |||
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STK12C68
STK12C68-M SMD#5962-94599
8K x 8 AutoStore⢠nvSRAM
QuantumTrap⢠CMOS
Nonvolatile Static RAM
FEATURES
⢠25ns, 35ns, 45ns and 55ns Access Times
⢠âHands-offâ Automatic STORE with External
68µF Capacitor on Power Down
⢠STORE to Nonvolatile Elements Initiated by
Hardware, Software or AutoStore⢠on Power
Down
⢠RECALL to SRAM Initiated by Software or
Power Restore
⢠10mA Typical ICC at 200ns Cycle Time
⢠Unlimited READ, WRITE and RECALL Cycles
⢠1,000,000 STORE Cycles to Nonvolatile Ele-
ments (Commercial/Industrial)
⢠100-Year Data Retention in Nonvolatile Ele-
ments (Commercial/Industrial)
⢠Commercial, Industrial and Military Tempera-
tures
⢠28-Pin SOIC, DIP and LCC Packages
DESCRIPTION
The Simtek STK12C68 is a fast static RAM with a
nonvolatile element incorporated in each static
memory cell. The SRAM can be read and written an
unlimited number of times, while independent, non-
volatile data resides in Nonvolatile Elements. Data
transfers from the SRAM to the Nonvolatile Elements
(the STORE operation) can take place automatically
on power down. A 68µF or larger capacitor tied from
VCAP to ground guarantees the STORE operation,
regardless of power-down slew rate or loss of power
from âhot swappingâ. Transfers from the Nonvolatile
Elements to the SRAM (the RECALL operation) take
place automatically on restoration of power. Initia-
tion of STORE and RECALL cycles can also be soft-
ware controlled by entering specific read
sequences. A hardware STORE may be initiated with
the HSB pin.
BLOCK DIAGRAM
VCCX VCAP
A5
A6
A7
A8
A9
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
QUANTUM TRAP
128 x 512
STATIC RAM
ARRAY
128 x 512
STORE
RECALL
COLUMN I/O
COLUMN DEC
POWER
CONTROL
STORE/
RECALL
CONTROL
SOFTWARE
DETECT
A0 A1 A2 A3 A4 A10
G
E
W
PIN CONFIGURATIONS
HSB
A0 - A12
28 - LCC
VCAP 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
DQ0 11
DQ1 12
DQ2 13
VSS 14
28 VCCX
27 W
26 HSB
25 A8
24 A9
23 A11
22 G
21 A10
20 E
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
28 - DIP
28 - SOIC
PIN NAMES
A0 - A12
DQ0 -DQ7
E
W
G
HSB
VCCX
VCAP
VSS
Address Inputs
Data In/Out
Chip Enable
Write Enable
Output Enable
Hardware Store Busy (I/O)
Power (+ 5V)
Capacitor
Ground
October 2003
1 Document Control # ML0008 rev 0.4
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