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SG6105 Datasheet, PDF (1/13 Pages) List of Unclassifed Manufacturers – Power Supply Supervisor + Regulator + PWM
Power Supply Supervisor + Regulator + PWM
Product Specification
SG6105
FEATURES
PC half-bridge (or 494) power supply supervisor +
two 431 + PWM
High integration & few external components
Over-voltage protection for 3.3V, 5V and 12V
Under-voltage protection for 3.3V, 5V and 12V
Under-voltage protection for –12V and/or –5V
Over-power and short-circuit protection
Power-down warning circuitry
Power good circuitry
Delay time for PSON and PG signal
Remote ON/OFF function
On-chip oscillator and error amplifier
Two shunt regulator for 3.3V and 5V-Standby
Latching PWM for cycle-by-cycle switching
Push-pull PWM operation and totem pole outputs
Soft-start and maximum 93% duty cycle
APPLICATIONS
Switching mode power supply for Computers, such
as:
ATX
NLX
SFX (micro-ATX)
DESCRIPTION
SG6105 controller is designed for switching mode
power supply for desktop PCs. It provides all the
functions necessary to monitor and control the output of
the power supply. Remote ON/OFF control, power good
circuitry, some protection features against over-voltage
and over-power are implemented. It directly senses all the
output rails for OVP without the need of external dividers.
An innovated AC-signal sampling circuitry provides a
sufficient power-down warning signal for PG. A built-in
timer generates accuracy timing for control circuit
including the PS-off delay. The cycle-by-cycle PWM
switching prevents the power transformer from the
saturation and ensures the fastest response for the
short-circuit protection which greatly reduce the stress for
power transistors. Two internal precision TL431 shunt
regulators provide stable reference voltage and driver for
3.3V and 5V-standby regulation. Utilizing minimum
number of external components, the SG6105 includes all
of the functions for push-pull and/or half-bridge topology,
decreasing the production cost and PCB space, and
increasing the MTBF for power supply.
MARKING DIAGRAMS
PIN CONFIGURATION
20
SG6105T
XXXXXXXYYWWV
1
T: D = DIP
XXXXXXX: Wafer Lot
YY: Year; WW: Week
V: Assembly Location
PSON 1
20
VCC
V33
2
19
RI
V5
3
18
SS
OPP
4
17
IN
UVAC 5
16
COMP
NVP
6
15
GND
V12
7
14
FB1
OP2
8
13
VREF1
OP1
9
12
VREF2
PG
10
11
FB2
©System General Corp.
-1-
Version 2.3(IRO33.0011.B0)
www.sg.com.tw
June 19, 2003