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QL901M-6PS680 Datasheet, PDF (1/37 Pages) List of Unclassifed Manufacturers – QuickMIPS ESP Family
QL901M QuickMIPS™ Data Sheet
• • • • • • QuickMIPS ESP Family
1.0 Overview
The QuickMIPS™ Embedded Standard Products
(ESPs) family provides an out-of-the box solution
consisting of the QL901M QuickMIPS chip and
the QuickMIPS development environment. The
development environment includes a Reference
Design Kit (RDK) with drivers, real-time
operating systems, and QuickMIPS system
model. With the RDK, software and hardware
engineers can evaluate, debug, and emulate
their system in parallel.
CPU
• High-performance MIPS 4Kc processor runs
up to 133 MHz in .25µ
(173 Dhrystone MIPS)
• 1.3 Dhrystone MIPS per MHz
• MDU supports MAC instructions for
DSP functions
• 16 Kbytes of Instruction Cache
(4-way set associative)
• 16 Kbytes of Data Cache (4-way set
associative) with lockout capability per line
High-Performance Bus (AMBA AHB)
• High-performance 32-bit AMBA AHB bus
standard for high-speed system bus running
at half the CPU clock
• High-bandwidth memory controller for
SDRAM, SRAM, and EPROM
• SDRAM support for standard SDRAMs up to
256 MBytes with auto refresh, up to 4 banks
non-interleaved
• Support for PC100 type memories with up
to two chip enables
• EPROM controller for boot code
• 8-bit, 16-bit, and 32-bit device width support
• 16 Kbytes of on-chip, high-speed SRAM for
use by multiple AHB Bus Masters
• 32-bit 66/33 MHz PCI Host and Satellite
(Master/Target) operation with DMA
channels and FIFO for full bandwidth
• Two MAC10/100s with MII ports connect
easily to external transceivers/PHY devices
• One AHB 32-bit master port/one AHB
32-bit slave port to Programmable Fabric
• Global System Configuration and Interrupt
Controller
Peripheral Bus (AMBA APB)
• 32-bit APB runs at half the CPU clock
frequency (the same as the AHB clock)
• Three APB slave ports in the programmable
fabric
• Two serial ports (one with Modem control
signals and one with IRDA-compliant signals)
• Four general-purpose 32-bit timer/counters
on one APB port
16 Kbytes
SRAM
MIPS 4Kc
w/Caches
32-bit PCI
Ethernet
Ethernet
Memory
66/33 MHz 10/100 MAC 10/100 MAC Controller
Interrupt
Controller
ECI to AHB
AHB to APB
32-bit Advanced High-Performance Bus
Two 16550
Four 32-bit
UARTs
Timer/Counters
32-bit Advanced Peripheral Bus
3 APB
Slave
I/F
1 AHB
Master I/F
36 RAM Blocks (Configurations 128x18; 256x9; 512x4; or 1024x2)
Via-Link Programmable Fabric
Configurable
Logic Analyzer
Monitor (CLAM)
1 AHB
Slave I/F
18 ECU Blocks-- 8x8 Multiply, 16-bit carry/add
JTAG
Figure 1: Embedded QuickMIPS Block Diagram
QL901M QuickMIPSTM Data Sheet Rev B
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