PDU14F Datasheet, PDF (1/5 Pages) Data Delay Devices, Inc. – 4-BIT PROGRAMMABLE DELAY LINE

4-BIT PROGRAMMABLE
DELAY LINE
(SERIES PDU14F)
PDU14F
data
delay
3
®
devices, inc.
FEATURES
• Digitally programmable in 16 delay steps
• Monotonic delay-versus-address variation
• Two separate outputs: inverting & non-inverting
• Precise and stable delays
• Input & outputs fully TTL interfaced & buffered
• 10 T²L fan-out capability
• Fits standard 24-pin DIP socket
• Auto-insertable
OUT/
OUT
EN/
GND
N/C
IN
N/C
GND
N/C
N/C
EN/
GND
PACKAGES
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
VCC
A0
A1
A2
VCC
N/C
N/C
N/C
VCC
A3
N/C
N/C
PDU14F-xx
DIP
PDU14F-xxA4
Gull-Wing
PDU14F-xxB4
J-Lead
PDU14F-xxM
Military DIP
PDU14F-xxMC4
Military Gull-Wing
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The PDU14F-series device is a 4-bit digitally programmable delay line.
IN Delay Line Input
The delay, TD_A, from the input pin (IN) to the output pins (OUT, OUT/)
depends on the address code (A3-A0) according to the following formula:
OUT Non-inverted Output
OUT/ Inverted Output
A0-A3 Address Bits
TD_A = TD₀ + T_INC * A
EN/ Output Enable
VCC +5 Volts
where A is the address code, T_INC is the incremental delay of the device,
GND Ground
and TD₀ is the inherent delay of the device. The incremental delay is
specified by the dash number of the device and can range from 0.5ns through 100ns, inclusively. The
enable pins (EN/) are held LOW during normal operation. These pins must always be in the same state
and may be tied together externally. When these signals are brought HIGH, OUT and OUT/ are forced
into LOW and HIGH states, respectively. The address is not latched and must remain asserted during
normal operation.
SERIES SPECIFICATIONS
• Total programmed delay tolerance: 5% or 1ns,
whichever is greater
• Inherent delay (TD₀): 9ns typical (OUT)
8ns typical (OUT/)
• Setup time and propagation delay:
Address to input setup (T_AIS): 5ns
Disable to output delay (T_DISO): 6ns typ. (OUT)
• Operating temperature: 0° to 70° C
• Temperature coefficient: 100PPM/°C (excludes TD₀)
• Supply voltage V_CC: 5VDC ± 5%
• Supply current: I_CCH = 74ma
I_CCL = 30ma
• Minimum pulse width: 10% of total delay
©1997 Data Delay Devices
DASH NUMBER SPECIFICATIONS
Part
Number
PDU14F-.5
PDU14F-1
PDU14F-2
PDU14F-3
PDU14F-4
PDU14F-5
PDU14F-10
PDU14F-15
PDU14F-20
PDU14F-30
PDU14F-40
PDU14F-50
PDU14F-100
Incremental Delay
Per Step (ns)
.5 ± .3
1 ± .5
2 ± .5
3 ± 1.0
4 ± 1.0
5 ± 1.0
10 ± 1.5
15 ± 1.5
20 ± 2.0
30 ± 3.0
40 ± 4.0
50 ± 5.0
100 ± 10.0
Total Delay
Change (ns)
7.5 ± 1.0
15 ± 1.0
30 ± 1.5
45 ± 2.3
60 ± 3.0
75 ± 3.8
150 ± 7.5
225 ± 11.3
300 ± 15.0
450 ± 22.5
600 ± 30.0
750 ± 37.5
1,500 ± 75.0
NOTE: Any dash number between .5 and 100 not
shown is also available.
Doc #97002
DATA DELAY DEVICES, INC.
1
1/13/97
3 Mt. Prospect Ave. Clifton, NJ 07013