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PA502FMG Datasheet, PDF (1/5 Pages) List of Unclassifed Manufacturers – P-Channel Logic Level Enhancement Mode Field Effect Transistor
NIKO-SEM
P-Channel Logic Level Enhancement
Mode Field Effect Transistor
PA502FMG
SOT-23
Lead-Free
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
-20
150m
-3A
D
G
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
TC = 25 °C
TC = 70 °C
Power Dissipation
TC = 25 °C
TC = 70 °C
Operating Junction & Storage Temperature Range
VDS
VGS
ID
IDM
PD
Tj, Tstg
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
Junction-to-Ambient
RθJA
1Pulse width limited by maximum junction temperature.
2Duty cycle ≤ 1%
1 :GATE
2 :DRAIN
3 :SOURCE
LIMITS
-20
±12
-3
-1.4
-10
1.25
0.8
-55 to 150
MAXIMUM
166
UNITS
V
V
A
W
°C
UNITS
°C / W
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current1
Drain-Source On-State Resistance1
V(BR)DSS
VGS(th)
IGSS
IDSS
ID(ON)
RDS(ON)
STATIC
VGS = 0V, ID = -250µA
VDS = VGS, ID = -250µA
VDS = 0V, VGS = ±12V
VDS = -16V, VGS = 0V
VDS = -16V, VGS = 0V, TJ = 125 °C
VDS = -5V, VGS = -4.5V
VGS = -4.5V, ID =-2A
VGS = -2.5V, ID = -1A
LIMITS
UNIT
MIN TYP MAX
-20
V
-0.5 -0.9 -1.2
±100 nA
-1
µA
-10
-6
A
100 150
m
180 250
Nov-03-2004
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