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P3056LS Datasheet, PDF (1/3 Pages) List of Unclassifed Manufacturers – N-Channel Logic Level Enhancement Mode Field Effect Transistor
NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P3056LS
TO-263
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
25
50mΩ
ID
12A
D
G
S
1. GATE
2. DRAIN
3. SOURCE
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
TC = 25 °C
TC = 100 °C
Avalanche Energy
Repetitive Avalanche Energy2
L = 0.1mH
L = 0.05mH
Power Dissipation
TC = 25 °C
TC = 100 °C
Operating Junction & Storage Temperature Range
Lead Temperature (1/16” from case for 10 sec.)
VGS
ID
IDM
EAS
EAR
PD
Tj, Tstg
TL
LIMITS
±12
12
8
45
60
3
43
15
-55 to 150
275
UNITS
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Case
RθJC
Junction-to-Ambient
RθJA
Case-to-Heatsink
RθCS
1Pulse width limited by maximum junction temperature.
2Duty cycle ≤ 1%
TYPICAL
0.6
MAXIMUM
2.6
60
UNITS
°C / W
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V(BR)DSS
VGS(th)
IGSS
IDSS
STATIC
VGS = 0V, ID = 250µA
VDS = VGS, ID = 250µA
VDS = 0V, VGS = ±12V
VDS = 20V, VGS = 0V
VDS = 20V, VGS = 0V, TJ = 125 °C
LIMITS
UNIT
MIN TYP MAX
25
V
0.5 0.7 1.0
±250 nA
25
µA
250
1
AUG-09-2001