P2003EVG Datasheet, PDF (1/5 Pages) List of Unclassifed Manufacturers – P-Channel Logic Level Enhancement Mode Field Effect Transistor

NIKO-SEM
P-Channel Logic Level Enhancement
Mode Field Effect Transistor
P2003EVG
SOP-8
Lead-Free
PRODUCT SUMMARY
V_(BR)DSS
R_DS(ON)
I_D
-30
20mƸ
-9A
D
G
4 :GATE
5,6,7,8 :DRAIN
1,2,3 :SOURCE
S
ABSOLUTE MAXIMUM RATINGS (T_C = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current¹
T_C = 25 °C
T_C = 70 °C
Power Dissipation
T_C = 25 °C
T_C = 70 °C
Operating Junction & Storage Temperature Range
V_DS
V_GS
I_D
I_DM
P_D
T_j, T_stg
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
LIMITS
-30
±20
-9
-8
-50
2.5
1.3
-55 to 150
MAXIMUM
UNITS
V
V
A
W
°C
UNITS
Junction-to-Case
R_θJc
25
°C / W
Junction-to-Ambient
R_θJA
1_{Pulse width limited by maximum junction temperature.}
2_{Duty cycle ≤ 1%}
ELECTRICAL CHARACTERISTICS (T_C = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
50
°C / W
LIMITS
UNIT
MIN TYP MAX
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current¹
Drain-Source On-State
Resistance¹
Forward Transconductance¹
V_(BR)DSS
V_GS(th)
I_GSS
I_DSS
I_D(ON)
R_DS(ON)
g_fs
V_GS = 0V, I_D = -250µA
V_DS = V_GS, I_D = -250µA
-30
V
-1 -1.5 -3
V_DS = 0V, V_GS = ±20V
±100 nA
V_DS = -24V, V_GS = 0V
V_DS = -20V, V_GS = 0V, T_J = 125 °C
-1
µA
-10
V_DS = -5V, V_GS = -10V
V_GS = -4.5V, I_D = -7A
V_GS = -10V, I_D = -9A
V_DS = -10V, I_D = -9A
-50
25
15
24
A
35
mƸ
20
S
OCT-20-2004
1