L64782 Datasheet, PDF (1/4 Pages) List of Unclassifed Manufacturers – Single-Chip COFDM Receiver

L64782 Single-Chip COFDM
Receiver
OVERVIEW
DVB-T COMPLIANT DEMODULATION
The L64782, a fully integrated, single-chip COFDM (Coded Orthogonal
Frequency Division Multiplex) receiver, is the third generation chip in LSI Logic’s
family of highly integrated, high-performance solutions for digital terrestrial TV
(DTT) broadcast. Following-on from the highly successful L64781 and L64780
receivers, the L64782 is fully compliant with DVB-T standards, as defined by
ETS 300 744 and exceeds all mandatory requirements of today’s broadcasters,
placing it at the forefront of DVB-T receiver design.
PROVEN SOLUTION FOR FAST TIME-TO-MARKET
The L64782 comprises the COFDM demodulator with direct IF sampling,
a DVB-compliant FEC decoder, a 10-bit analog-to-digital converter and an
integrated microcontroller. With this device, digital set-top box and TV
manufacturers have a ready-proven, high-performance technology to bring
DTT-enabled products to market quickly and cost effectively.
MOBILE RECEPTION
The L64782 adds to the robust channel equalizer and doppler immunity
characteristics of its predecessors. Performance has been enhanced in both of
these critical areas and a diversity combining interface has been added to
allow two L64782 devices to be interconnected, giving Maximum Ratio
Combination (MRC) like performance, where best-in-class mobile performance
is required.
Coupled with the small 64-pin TQFP package and low power features, the
L64782 is ideally suited to mobile reception.
Host Serial Bus
Tuner
Serializer
AGC
Microcontroller
Detect
ADC
Digital
Filtering
Real to
Complex
Digital
Timing
Recovery
FFT
COFDM
Processing
SD Bits
TS
FEC
The L64782 is a highly integrated device that contains both digital timing and
frequency loops. No external components are needed to operate the demodulation
and only a low cost crystal is required.
FEATURES
• 2K and 8K FFT size
• DVB-T ETS 300-744 compliant
• Includes FEC and 10-bit ADC
• Choice of direct IF (36.167 MHz)
and low IF (4.57MHz) sampling
• Digital channel filter eliminates the
need for dual switchable bandwidth
SAW filter in tuner
• Digital timing recovery
• 6MHz, 7MHz and 8MHz variable
bandwidth capability
• Implements all non-hierarchical and
hierarchical constellations
• All code rates and guard intervals
• Includes digital common phase error
correction (CPE)
• Dual AGC control
• New timing algorithm for near
optimal echo and SFN pre-echo
performance
• Integrated microcontroller to auto-
mate acquisition, operating mode
determination and simplify chip
control
• Channel state information for
protection against multipath and
interference