IW4053B Datasheet, PDF (1/8 Pages) List of Unclassifed Manufacturers – Analog Multiplexer Demultiplexer

TECHNICAL DATA
IW4053B
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The IW4053B analog multiplexer/demultiplexer is digitally
controlled analog switches having low ON impedance and very low
OFF leakage current. Control of analog signals up to 20V peak-to-peak
can be achieved by digital signal amplitudes of 4.5 to 20V (if V_CC - GND
= 3V, a V_CC - V_EE of up to 13 V can be controlled; for V_CC - V_EE level
differences above 13V a V_CC - GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V_CC -GND and V_CC - V_EE supply-voltage ranges,
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The IW4053B is a triple 2-channel multiplexer having three separate
digital control inputs, A, B, and C, and an enable input. Each control
input selects one of a pair of channels which are connected in a single-
pole double-throw configuration.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4053BN
Plastic DIP
IW4053BD
SOIC
IZ4053B
chip
T_A = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
Triple Single-Pole, Double-Position
Plus Common Off
PIN 16 =V_CC
PIN 7 = V_EE
PIN 8 = GND
INTEGRAL
FUNCTION TABLE
Control Inputs
Enable
Select
C BA
L LLL
L L LH
L LHL
L L HH
L HLL
L H LH
L HHL
L HHH
H XXX
H = high level
L = low level
X = don’t care
ON
Channels
Z0 Y0 X0
Z0 Y0 X1
Z0 Y1 X0
Z0 Y1 X1
Z1 Y0 X0
Z1 Y0 X1
Z1 Y1 X0
Z1 Y1 X1
None
1