GLT6400L08 Datasheet, PDF (1/10 Pages) List of Unclassifed Manufacturers – Ultra Low Power 512k x 8 CMOS SRAM

G-LINK
GLT6400L08
Ultra Low Power 512k x 8 CMOS SRAM
Feb 2001(Rev. 1.1)
Features :
Description :
∗ Low-power consumption.
The GLT6400L08 is a low power CMOS Static
-active: 45mA at 85ns.
RAM organized as 524,288 x 8 bits. Easy memory
-stand by :
expansion is provided by an active LOW CE1 an
20 µA (CMOS input / output)
5 µA (CMOS input / output, SL)
active LOW OE , and Tri-state I/O’s. This device has
∗ Single +2.7 to 3.3V power supply.
an automatic power-down mode feature when
∗
∗
Equal access and cycle time.
85 ns access time at 2.7V to 3.3V 70ns
access time at 3V to 3.6V
deselected.
Writing to the device is accomplished by taking
chip Enable 1 ( CE1 ) with Write Enable ( WE ) LOW.
∗ 1.0V data retention mode.
Reading from the device is performed by taking Chip
∗ TTL compatible, tri-state input/output. ^{Enable 1 ( CE1 ) with Output Enable ( OE ) LOW}
∗ Automatic power-down when deselected. while Write Enable ( WE ) and Chip Enable 2 (CE2)
∗ Industrial grade (-40°C ~ 85°C)
available.
is HIGH. The I/O pins are placed in a high-impedance
state when the device is deselected : the outputs are
∗ Package available: sTSOP , SOP.
disabled during a write cycle.
The GLT6400L08 comes with a 1V data retention
feature and Lower Standby Power. The GLT6400L08
is available in a 32-pin sTSOP packages,and 32pin
SOP package.
Function Block Diagram :
INPUT BUFFER
I/O7
Cell
Array
I/O1
COLUMN DECODER
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
Column Address
-1-
OE
CONTROL
WE
CIRCUIT
CE1
CE2
G-Link Technology Corporation, Taiwan
6F No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.