EDI8L32256C Datasheet, PDF (1/5 Pages) List of Unclassifed Manufacturers – 256Kx32, 5V Static Ram

EDI8L32256C
256Kx32 SRAM Module
Features
256Kx32 bit CMOS Static
DSP Memory Solution
• Texas Instruments TMS320C3x, TMS320C4x
• Analog SHARC^TM DSP
• Motorola DSP96002
Random Access Memory Array
• Fast Access Times: 15, 17, 20 and 25ns
• Individual Byte Enables
• User Configurable Organization
with Minimal Additional Logic
• Master Output Enable and Write Control
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
Surface Mount Package
• 68 Lead PLCC, No. 99, JEDEC MO-47AE
• Small Footprint, 0.990 Sq. In.
• Multiple Ground Pins for Maximum
Noise Immunity
Single +5V (±5%) Supply Operation
Pin Configurations and Block Diagram
256Kx32, 5V Static Ram
The EDI8L32256C is a high speed, 5V, 8 megabit SRAM.
The device is available with access times of 15, 17, 20 and
25ns, allowing the creation of a no wait state DSP memory
solution.
The device can be configured as a 256Kx32 and used to
create a single chip external data memory solution for
Texas Instruments' TMS320C30/31, TMS 320C32 or
TMS320C4x, Motorola's DSP96002 and Analog Device's
SHARC^TM DSP.
Alternatively the device's chip enables can be used to
configure it as a 512Kx16. A 512Kx48 program memory
array for Analog's SHARC^TM DSP is created using three
devices. If this memory is too deep, two 256Kx24s
(EDI8L24256C) can be used to create a 256Kx48 array or
two 128Kx24s (EDI8L24128C) can be used to create a
128Kx48 array.
The device provides a 32% space savings when compared
to two monolithic 256Kx16, 44 pin SOJs.
The device provides a memory upgrade of the
EDI8L32128C (128Kx32) and the EDI8L3265C (64Kx32).
For more memory the device can be upgraded to the
EDI8L32512C (512Kx32).
NOTE: Solder Reflow temperature should not exceed 260°C for 10 seconds.
DQ17 10
DQ18 11
DQ19 12
VSS 13
DQ20 14
DQ21 15
DQ22 16
DQ23 17
VCC 18
DQ24 19
DQ25 20
DQ26 21
DQ27 22
VSS 23
DQ28 24
DQ29 25
DQ30 26
60 DQ14
59 DQ13
58 DQ12
57 VSS
56 DQ11
55 DQ10
54 DQ9
53 DQ8
52 VCC
51 DQ7
50 DQ6
49 DQ5
48 DQ4
47 VSS
46 DQ3
45 DQ2
44 DQ1
Note: For memory upgrade information refer to page 8, Figure 8 "EDI MCM-L
upgrade path".
Pin Names
AØ-A17
EØ-E1
BSØ-BS3
W
G
DQØ-DQ31
VCC
VSS
NC
AØ-A17 ₁₈
G
W
EØ
E1
BSØ
BS1
BS2
BS3
Address Inputs
Chip Enables (One per Word)
Byte Selects (One per Byte)
Master Write Enable
Master Output Enable
Common Data Input/Output
Power (+5V±5%)
Ground
No Connection
256Kx32
Memory
Array
DQØ-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
Electronic Designs Incorporated
• One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX [phone] •
http://www.electronic-designs.com
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EDI8L32256C Rev. 4 3/98 ECO#9662