D6301 Datasheet, PDF (1/1 Pages) List of Unclassifed Manufacturers – Pentium/SDRAM Clock Generator with Integrated Buffers

PLL52C63-01
Pentium/SDRAM Clock Generator with Integrated Buffers
FEATURES
n Generates all clock frequencies for Pentium (II), AMD
and Cyrix system requiring multiple CPU clocks.
n Supports up to16 Synchronous CPU clocks (4 CPU and
12 SDRAM) and 7 Synchronous PCI BUS clocks.
n Two 14.318Mhz reference clocks and one 2.5V IOAPIC
n One 24Mhz floppy clock and one 48Mhz USB clock.
n Power management control pins to stop CPU, SDRAM
or PCI BUS clocks.
n Supports 2-wire I2C serial bus interface.
n 50% duty cycle with low jitter
n Mixed voltage support from 3.0 to 5V or (VDDq2=2.5V)
n Available in 300mil 48 pin SSOP.
PIN INFORMATION
FREQUENCY SELECTION (MHz)
F2 F1 F0 PCLK/SDRAM
000
50
001
100
010
83.3
011
68.5
100
55
101
75
110
60
111
66.6
BCLK
25
50
41.6
34.2
27.5
37.5
30
33.3
BLOCK DIAGRAM
Note: F2,F1,F0 and MODE are selectable only during power-on. They are
HIGH by default and LOW when 10K Ω Pull down is attached.
I/O MODE CONFIGURATION
MODE
1 (OUTPUT)
0 (INPUT)
PIN15
BCLK5
PCISTP
PIN46
REF1
CPUSTP
45437 Warm Springs Blvd., Fremont, California 94539, TEL [phone] FAX [phone]
9704.Rev.1C Page 1