C8051F301 Datasheet, PDF (1/2 Pages) List of Unclassifed Manufacturers – 8KB Flash, 256 RAM, 11-Pin MCU

C8051F301
COMPARATOR
- Programmable Hysteresis and Response Time
- Configurable as Wake-up or Reset Source
- Low Current (0.4uA)
ON-CHIP DEBUG
- On-Chip Debug Circuitry Facilitates Full Speed,
Non-Intrusive In-System Debug (No Emulator
Required!)
- Provides Breakpoints, Single Stepping,
Watchpoints
- Inspect/Modify Memory, Registers, and Stack
- Superior Performance to Emulation Systems
Using ICE-Chips, Target Pods, and Sockets
- Low Cost, Complete Development Kit
SUPPLY VOLTAGE ............... 2.7V to 3.6V
- Typical Operating Current: 5.8mA @ 25MHz
11uA @ 32kHz
- Typical Stop Mode Current: <0.1uA
Temperature Range: –40°C to +85°C
8KB Flash, 256 RAM, 11-Pin MCU
PRELIMINARY
HIGH SPEED 8051 µC Core
- Pipe-lined Instruction Architecture; Executes 70% of
Instructions in 1 or 2 System Clocks
- Up to 25MIPS Throughput with 25MHz Clock
- Expanded Interrupt Handler
MEMORY
- 256 Bytes Internal Data RAM
- 8k Bytes FLASH; In-System Programmable in 512 byte
Sectors
DIGITAL PERIPHERALS
- 8 Port I/O; All 5V tolerant with High Sink Current
- Enhanced Hardware UART and SMBus Serial Ports
- Three General Purpose 16-Bit Counter/Timers
- 16-bit Programmable Counter Array with Three
Capture/Compare Modules, WDT
- Real Time Clock Mode using PCA or Timer and
External Clock Source
CLOCK SOURCES
- Internal Oscillator: 25MHz, 2% Accuracy Supports UART
Operation
- External Oscillator: Crystal, RC, C, or Clock (1 or 2 Pin
Modes)
- Can Switch Between Clock Sources on-the-fly; Useful in
Power Saving Modes
11-Pin Micro Lead Package
- 3 x 3mm PCB Footprint; Actual MLP Size
SMBus is a trademark of Intel Corp.
VDD
GND
/RST/C2CK
Analog/Digital
Power
C2D
Debug HW
8
0
8kbyte
5 ^Reset
FLASH
POR
Brown-
Out
1
256 byte
SRAM
C
XTAL1
XTAL2
External
Oscillator
Circuit
o SFR Bus
r ^{System Clock}
2%
e
Internal
Oscillator
Port 0
Latch
UART
Timer 0,
1, 2 / RTC
PCA/
WDT
SMBus
P
X
0
B
A
D
R
r
v
CP0
C2D
+
-
P0.0
P0.1
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVST
P0.7/C2D
10.15.2001