88W8500 Datasheet, PDF (1/2 Pages) –

Libertas^™
Wireless LAN 802.11b Access Point Chipset
88W8000 and 88W8500
P_ThR_eO_MD_aU_rC_veT_ll¨O_LV_iE_beR_rV_taI_sE_ªW_{88W8000 and 88W8500 Wireless LAN (WLAN) chipset comprises the worldÕs most integrated}
802.11b Access Point solution. The 88W8000 product performs all of the functions of an RF transceiver by
integrating a 20 dBm power ampliÞer, low noise ampliÞer, voltage-controlled oscillator, frequency synthesizer, as
well as other necessary RF and analog functions onto one CMOS chip. The 88W8500 device is a single chip that
combines the functions of the Direct Sequence Spread Spectrum (DSSS) baseband processor, Medium Access
Control (MAC) processor, on-chip CPU, on-chip memory, advanced encryption, external SDRAM/FLASH memory
controller, and one Fast Ethernet port (MAC and PHY). The high level of integration reduces the overall Bill of
Materials (BOM) cost for an access point by eliminating the need for an external CPU and Fast Ethernet port for
wired infrastructure connectivity. Together, the Libertas 88W8000 and 88W8500 chipset supports IEEE 802.11b
data rates of 1, 2, 5.5 and 11 Mbps, as well as a proprietary data rate of 22 Mbps. The 88W8000 and 88W8500
chipset provides an optimal solution for access points as well as wireless home gateway applications.
88W8500
2.4 GHz
Baseband Processor
88W8000
DAinvteernsnitay
P8Er0Mno2gtAo.iCn1ce1ol
CSoFnDltaRrsoAhlMler
EFSlxDatsRehArnMoarl
OnL-NCAhip _Receiver
ADC Modulator
SEencguirnitey
880022..33uu MPHAYC
MTwIIis,tPeCdIP, _aoirr
FiRltFer SwRiFtch
VCO _{SFyrnetqhueesnizceyr}
DAC Demodulator
ACRPMU9
JTAG
On-PCAhip _Transmitter
Memory
TR_SW Serial I/F PEConowanbterlroel _4X4OMSHCz
UART
GLPEIDO/
MPogwmetr. ^{(CEoESnPetRrrioOalllMer)}
T/R Switch, Serial Interface, Power Enable Control
5X0OMSHCz
Fig 1. Libertas WLAN 802.11b Access Point Chipset (88W8000 and 88W8500) Block Diagram
EEPROM
GPIO (15:0)
88W8000 FEATURES
Â¥ 2.4 GHz ISM Band Radio
Â¥ Irnecteegivreatfiuonncotifoanlal _lRitFietso analog baseband transmit and
¥ Oannt-ecnhnipa pcoownneercatmorpliÞer with 20 dBm output power at the
¥ On-chip power ampliÞer is programmable from 0 dBm to 20 dBm
Â¥ Integrated power loop control
Â¥ 2x higher receiver sensitivity
Â¥ PVrCoOgsraamnmd aI/bQlegferenqeuraetniocny synthesizers with integrated
BENEFITS
Â¥ Oponpeuslainrg8le02c.h1i1pbsustpapnodratsrdall RF to analog baseband functions of the
¥ RfoerdmucfeasctBorOM cost, simpliÞes board layout and provides smaller
Â¥ Reduces cost and increases range
Â¥ Aanllodwesxtteranndsemd ibtaptotewreyrlicfoenftorrolhtoostbseyismtepmlemented for power savings
¥ Stetmabpileizraetsupreo,wveorltaamgeplsiÞueprpolyutapnudt _{saetmusiceornddeuscitgonravteadriavtaioluness} across
Â¥ Improves detection of weak signals and increases range
Â¥ Pforrovbiedset fsoigr _{nloanlgreecrerpatniogne} in terms of adaptive gain adjustments