IW4520B Datasheet, PDF (1/6 Pages) Integral Corp. – Dual Up - Counter High - Voltage Silicon - Gate CMOS

IW4520B
Description
The IW4520B Dual Binary Up-Counter consists two identical, internally synchronous 4- stage counters. The
counter stages are D- type flip-flops having interchang eable CLOCK and ENABLE lines for incrementing on
either the positive-going or negative-going transition.For single-unit operation the ENABLE input is maintained
high and the counter advances on each positive-going transition of the CLOCK.The counters are cleared by high
levels on their RESET lines.
The counter can be cascaded in the ripple mode by connecting Q4 to the enable i nput of the
counstuebr ^{swehqiuleenthte} CLOCK of the latter is held low.
input
Features
 Operating Voltage Range: 3.0 to 18 V
 Maximum input current of 1u A at 18 V over full package-
temperature range;100 nA at 18 V and 25 C
 Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
16
16
DIP - 16
SOP - 16
Package
Pin Assignment
Logic Diagram
CLOCK A ¹
ENABLE A ²
RESET A ⁷
CLOCK B
9
ENABLE _B 10
RESET ^{B 15}
PIN 16 = VCC
PIN 8 =
GND
3 _Q1A
4 _Q2A
5
6
Q3A
R
Q4A
CLOCK
1
A
2
ENABLE
A
3
Q1 A ⁴
Q2 A ⁵
Q3 A ⁶
Q4 A 7
GND 8
16 V CC
15 RESET
B
14
13 ^{Q4 B}
Q3 B
12
11 ^{Q2 B}
Q1 B
10
B
ENABLE
9
CLOCK
B
Function Table
11 _{Q1 B}
Inputs
Outputs
12 _{Q2 B}
CLOCK ENABLE RESET Mode
13 _{Q3 B}
R
14 _{Q4 B}
L
H
L IncrementCounter
L IncrementCounter
X
L
No Change
X
L
No Change
L
L
No Change
H
L
No Change
X
X
H
thru Q4Q =1
L
X = don ' t care
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