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IW4013B Datasheet, PDF (1/5 Pages) Integral Corp. – Dual D Flip-Flop High-Voltage Silicon-Gate CMOS
IW4013B
Description
The IW4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data,
set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications,
and, by connecting Qoutput to the data input,for counter and toggle applications. The logic level present at the
Input is transferred to the
Dresetting is independent of
the
Q output during the positive- going Transition of the clock pulse. Setting or
clock and is accomplished by a high level on the set or reset line,respectively.
Features
 Operating Voltage Range: 3.0 to 18 V
 Maximum input current of 1 uA at 18 V over full package-
temperature range ;100 nA at 18 V and 25 C
 Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
14
1
SOP
14
14
1
DIP 14
Package
Logic Diagram
6
Set 1
Data
5
1
3
Clock 1
Reset 4
1
8
Set 2
9
Data 2
Clock 2 11
10
Reset 2
1
Q1
2 Q1
13
Q2
12 Q2
PIN 14 =
DDV
PIN 7 =
Pin Assignment
Q1
Q1
Clock 1
Reset 1
Data 1
Set 1
GND
Vcc
Q2
Q2
Clock 2
Reset 2
Data 2
Set 2
Function Table
Inputs
Clock Data Reset Set
L LL
H LL
X LL
X X HL
X X LH
X X HH
Outputs
QQ
LH
HL
QQ
LH
HL
HH
X = don ' t care
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