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| M24L416256DA Datasheet, PDF (7/15 Pages) Elite Semiconductor Memory Technology Inc. – 4-Mbit (256K x 16) Pseudo Static RAM | |||
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ESMT
Switching Waveforms (continued)
Write Cycle No. 1( WE Controlled)[12, 13, 17, 18, 19]
M24L416256DA
Notes:
17.Data I/O is high impedance if OE > VIH.
18.If Chip Enable goes INACTIVE simultaneously with WE =HIGH, the output remains in a high-impedance state.
19.During the DONâT CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jul. 2008
Revision: 1.5
7/15
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