M12S64322A Datasheet, PDF (6/46 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 32 Bit x 4 Banks Synchronous DRAM

ESMT
CAPACITANCE (VDD = 2.5V, TA = 25 °C , f = 1MHZ)
Parameter
Symbol
Min
Input capacitance (A0 ~ A10, BA0 ~ BA1)
CIN1
2.5
Input capacitance
CIN2
2.5
(CLK, CKE, CS , RAS , CAS , WE & DQM)
Data input/output capacitance (DQ0 ~ DQ31)
COUT
2
M12S64322A
Max
Unit
4
pF
4
pF
6.5
pF
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted，TA = 0 to 70 °C
Parameter
Symbol
Test Condition
CAS
Latency
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
Precharge Standby Current
in non power-down mode
Active Standby Current
in power-down mode
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0 mA
CKE ≤ VIL(max), tcc = 15ns
CKE & CLK ≤ VIL(max), tcc = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 15ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tcc = ∞
input signals are stable
CKE ≤ VIL(max), tcc = 15ns
CKE & CLK ≤ VIL(max), tcc = ∞
Active Standby Current
in non power-down mode
(One Bank Active)
ICC3N
ICC3NS
CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 15ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tcc = ∞
input signals are stable
Operating Current
(Burst Mode)
ICC4
IOL = 0 mA
Page Burst
3
2 Banks activated
2
Refresh Current
ICC5
Self Refresh Current
ICC6
tRC ≥ tRC(min)
CKE ≤ 0.2V
Note : 1. Measured with outputs open.
2. Input signals are changed one time during 2 CLKS.
Version
-6
-7
Unit Note
160 140 ^{mA 1,2}
2
mA
2
30
mA
10
10
mA
10
40
mA
10
mA
250 220
mA 1,2
200 180
310 285 mA
2
mA
Elite Semiconductor Memory Technology Inc.
Publication Date: May. 2007
Revision: 1.0
6/46