M52D16161A_09 Datasheet, PDF (4/32 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 16Bit x 2Banks Mobile Synchronous DRAM

ESMT
M52D16161A
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 °C ~ 70 °C )
Parameter
Symbol
Test Condition
Version
-10
-15
Unit Note
Operating Current
(One Bank Active)
ICC1
Precharge Standby
Current in power-down
mode
ICC2P
ICC2PS
Burst Length = 1
tRC ≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA
CKE ≤ VIL(max), tCC =15ns
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
15
20
0.12
0.1
mA 1
mA
mA
Precharge Standby
Current in non
power-down mode
Active Standby Current
in power-down mode
ICC2N
ICC2NS
ICC3P
ICC3PS
Active Standby Current
in non power-down
mode
(One Bank Active)
ICC3N
ICC3NS
Operating Current
ICC4
(Burst Mode)
Refresh Current
ICC5
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =15ns
Input signals are changed one time during 30ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
CKE ≤ VIL(max), tCC =15ns
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns
Input signals are changed one time during 30ns
CKE ≥ VIH (min), CLK ≤ VIL(max), tCC= ∞
Input signals are stable
IOL= 0mA, Page Burst
All Band Activated, t_CCD = t_CCD (min)
tRC ≥ tRC(min)
TCSR range
5.5
mA
1
mA
1.5
mA
1
10
mA
5
mA
25
20
mA 1
25
45 70
20
mA 2
45 70 ^°C
Self Refresh Current
ICC6
CKE ≤ 0.2V
2 Banks
1 Bank
1/2 Bank
50 75 50 75
45 65 45 65
uA
40 55 40 55
1/4 Bank
35 45 35 45
Deep Power Down
Current
ICC7
CKE ≤ 0.2V
10
uA
Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min).
2.Refresh period is 32ms. Addresses are changed only one time during tCC(min).
Elite Semiconductor Memory Technology Inc.
Publication Date : May 2009
Revision : 1.7
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