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204820 Datasheet, PDF (1/1 Pages) ERNI Electronics – SVA 6-polig EE
( 1,96)
Leiterplatten Oberkante
7,62
2,54
2 x 2,54 = 5,08
9
Leiterplattenbohrbild
PCB drillhole pattern
2 x 2.54 = 5,08
2,54
0,7
0,7
Schichtaufbau im metallisierten Loch siehe Zeichnung 114124
diameter of drilled hole see drawing 114124
+ 0,09
1) ø 1,0 - 0,06 Durchmesser des metallisierten Loches
+ 0,09
ø 1,0 - 0,06 Diameter of finished plated-through hole
ø 1,15 ± 0,025 Bohrungsdurchmesser des Loches
ø 1,15 ± 0,025 Diameter of drilled hole
Dieser Bereich muß gleiches
Potential auf LP-Oberfläche
haben
This area must have same
electrical potential
on surface of PCB
1)
ø0.05
( alle Löcher/ a)ll holes
214787
214796
214797
M4
M3
6-32UNC
214798
8-32UNC
Information:
All rights reserved.
Only for information.
To insure that this is the latest
version of this drawing, please
contact one of the ERNI companies
before using.
b
Index
11.05.2006
Date
Ident-Nr.
Part No.
Gewinde
thread
Tolerances
Scale
5:1
All Dimensions
in mm
Subject to modification without
prior notice.
Drawing will not be updated.
Designation
SVA 6-polig EE
Power Bug 6pin EE
www.ERNI.com
204820
I
C:00057489.SZA
EPSVA