204818 Datasheet, PDF (1/1 Pages) ERNI Electronics – SVA 10-polig EE

2,54
7,62
( 0,92 )
4 x 2,54 = 10,16
Leiterplatten Oberkante
12
Leiterplattenbohrbild
PCB drillhole pattern
0,7
4 x 2.54 = 10,16
0,7
2,54
Schichtaufbau im metallisierten Loch siehe Zeichnung 114124
diameter of drilled hole see drawing 114124
+ 0,09
1) ø 1,0 _{- 0,06} Durchmesser des metallisierten Loches
+ 0,09
ø 1,0 _{- 0,06} Diameter of finished plated-through hole
ø 1,15 ^{± 0,025} Bohrungsdurchmesser des Loches
ø 1,15 ^{± 0,025} Diameter of drilled hole
Dieser Bereich muß gleiches
Potential auf LP-Oberfläche
haben
This area must have same
electrical potential
on surface of PCB
1)
ø0.05
( alle Löcher/ a)ll holes
214782
M4
214781
M3
214780
6-32UNC
214779
8-32UNC
Information:
All rights reserved.
Only for information.
To insure that this is the latest
version of this drawing, please
contact one of the ERNI companies
before using.
b
Index
11.05.2006
Date
Ident-Nr.
Part No.
Gewinde
thread
Tolerances
Scale
5:1
All Dimensions
in mm
Subject to modification without
prior notice.
Drawing will not be updated.
Designation
SVA 10-polig EE
Power Bug 10pin EE
www.ERNI.com
204818
I
H:00057487.SZA
EPSVA