S2R72V18 Datasheet, PDF (20/37 Pages) Epson Company – Supports HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps) transfer

6. Terminal Functions
CPU I/F
Pin Ball
Name
I/O
RESET
Terminal
type
Terminal description
Bus Mode ⇒ 16bit Strobe mode
16bit BE mode
17 J2 XRESET
IN
-
-
Reset signal
33 L7 XRD
IN
-
-
Read/strobe
35 J7 XWRL (XWR) IN
-
-
Write/strobe (lower) Write/strobe
34
K7
XWRH
(XBEH)
IN
-
-
Write/strobe (upper) High-byte enable
32 J6 XCS
IN
-
-
Chip select signal
31 K6 XINT
OUT
High
2mA
(Tri-state)
Interrupt output signal
37 K8 XDREQ0
OUT High
2mA
Port 0 DMA request
38 L9 XDACK0
IN
-
-
Port 0 DMA acknowledge
39 K9 XDREQ1
OUT High
2mA
Port 1 DMA request
40 L10 XDACK1
IN
-
-
Port 1 DMA acknowledge
18 K1 XBEL
IN
-
-
Set to High or Low Low-byte enable
20 K2 CA1
21 L2 CA2
22 K3 CA3
IN
-
-
IN
-
-
IN
-
-
23 L3 CA4
24 J4 CA5
26 K4 CA6
27 K5 CA7
28 L5 CA8
29 J5 CA9
42 J11 CD0
43 J10 CD1
44 H10 CD2
45 H11 CD3
46 G9 CD4
47 G10 CD5
IN
-
IN
-
IN
-
IN
-
IN
-
IN
-
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
-
-
-
-
-
-
2mA
2mA
2mA
2mA
2mA
2mA
CPU bus address
49 F9 CD6
50 F10 CD7
51 F11 CD8
52 E9 CD9
53 E10 CD10
55 D11 CD11
56 D10 CD12
57 C11 CD13
58 C10 CD14
59 B10 CD15
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
BI
Hi-Z
2mA
2mA
2mA
2mA
2mA
2mA
2mA
2mA
2mA
2mA
CPU data bus
The XINT terminal can be set to 1/0 or Hi-Z/0 mode, depending on register settings.
PD: Pull Down
PU: Pull Up
S2R72V18 Data Sheet (Rev. 1.00)
EPSON
15