S1K50000 Datasheet, PDF (116/130 Pages) Epson Company – Standard-Cell Development Flow

Chapter 9: Precautions on the Use of Dual Power Supplies
9.3.3.2 HV_DD-System Output Buffers
The available types of S1K50000-series HV_DD-system output buffers are listed in Tables 9-7-1
through 9-8-2.
Table 9-7-1 HV_DD-System Output Buffers
Function
Normal output
Output for PCI
Normal output for high speed
Normal output for low noise
3-state output
Output for PCI
3-state output for high speed
3-state output for low noise
3-state output (Bus hold circuit)
3-state output for high speed
(Bus hold circuit)
3-state output for low noise
(Bus hold circuit)
I_OL* / I_OH**
0.1 mA / -0.1 mA
1 mA / -1 mA
3 mA / -3 mA
8 mA / -8 mA
12 mA / -12 mA
24 mA / -12 mA
PCI-5V
12 mA / -12 mA
24 mA / -12 mA
12 mA / -12 mA
24 mA / -12 mA
0.1 mA / -0.1 mA
1 mA / -1 mA
3 mA / -3 mA
8 mA / -8 mA
12 mA / -12 mA
24 mA / -12 mA
PCI-5V
12 mA / -12 mA
24 mA / -12 mA
12 mA / -12 mA
24 mA / -12 mA
1 mA / -1 mA
3 mA / -3 mA
8 mA / -8 mA
12 mA / -12 mA
24 mA / -12 mA
12 mA / -12 mA
24 mA / -12 mA
12 mA / -12 mA
24 mA / -12 mA
(HV_DD = 5.0 V)
Cell Name***
XHOBST
XHOBMT
XHOB1T
XHOB2T
XHOB3T
XHOB4T
XHOBPAT
XHOB3AT
XHOB4AT
XHOB3BT
XHOB4BT
XHTBST
XHTBMT
XHTB1T
XHTB2T
XHTB3T
XHTB4T
XHTBPAT
XHTB3AT
XHTB4AT
XHTB3BT
XHTB4BT
XHTBMHT
XHTB1HT
XHTB2HT
XHTB3HT
XHTB4HT
XHTB3AHT
XHTB4AHT
XHTB3BHT
XHTB4BHT
Notes * V_OL = 0.4 V (HV_DD = 5.0 V)
** V_OH = HV_DD - 0.4 V (HV_DD = 5.0 V)
*** For output buffers, in addition to those listed in Table 9-7-1, use of a configuration without test pins may be
considered. If the use of such a configuration is desired, contact Seiko Epson or its distributor.
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
EPSON
111