S1L35000 Datasheet, PDF (10/106 Pages) Epson Company – GATE ARRAY

Chapter 1: Overview
Table 1-6 Electrical Characteristics of the S1L35000 Series
(V_DD = 3.3 V ± 0.3 V, V_SS = 0 V, Ta = -40 to 85 ^oC)
Item
Quiescent Current
Input Leakage Current
Off State Leakage Current
High Level Output Voltage
Low Level Output Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Input Voltage
Low Level Input Voltage
Hysteresis Voltage
Pull-up Resistance
Pull-down Resistance
Input Terminal Capacitance
Output Terminal Capacitance
Input/Output Terminal
Capacitance
Symbol
Conditions
I_DDS
Quiescent Conditions
I_LI
--
I_OZ
--
I_OH = -0.5 mA (Type M), -2 mA (Type 1),
V_OH
-4 mA (Type 2), -6 mA (Type 3)
V_OL
V_DD = Min.
I_OL = 0.5 mA (Type M),2 mA (Type 1),
4 mA (Type 2), 6 mA (Type 3)
V_IH1
V_IL1
V_T1+
V_T1-
V_H1
R_PU
R_PD
C_l
C_O
V_DD = Min.
CMOS Level, V_DD = Max.
CMOS Level, V_DD = Min.
CMOS Schmitt, V_DD = 3.3 V
CMOS Schmitt, V_DD = 3.3 V
CMOS Schmitt, V_DD = 3.3 V
V_I = 0 V
Type 1
Type 2
V_I = V_DD
Type 1
Type 2
f = 1 MHz, V_DD = 0 V
f = 1 MHz, V_DD = 0 V
C_IO
f = 1 MHz, V_DD = 0 V
Min. Typ. Max. Unit
--
-- 290 µA
-1
--
1
µA
-1
--
1
µA
V_DD
--
--
V
-0.3
--
-- 0.3 V
2.2 --
--
V
--
-- 0.8 V
--
-- 2.4 V
0.6 --
--
V
0.1 --
--
V
45 90 180
kΩ
90 180 360
45 90 180
kΩ
90 180 360
--
-- 12 pF
--
-- 12 pF
--
-- 12 pF
GATE ARRAY S1L35000 SERIES
EPSON
5
DESIGN GUIDE