VG7050ECN Datasheet, PDF (1/3 Pages) Epson Company – Programmable Voltage Controlled Oscillator (VCXO)

Crystal oscillator
Programmable Voltage Controlled Oscillator (VCXO)
OUTPUT: LV-PECL
VG7050ECN
 Frequency range
: 50 MHz to 800 MHz
(Tuning resolution: 2.2 ~ 2.8 x 10^-9)
 Supply voltage
: 2.5 V / 3.3 V
 External dimensions : 7.0 × 5.0 × 1.5 mm (10 pins)
 Absolute Pull Range : ±0 to ±180 x 10^-6 (12 steps selectable)
Features
 User-specified four startup frequency, APR and 7-bit I²C address
 User Programming : I²C Interface
 Low jitter PLL technology
Applications
SONET/SDH, OTN, GbE, Fibre Channel
Actual size
Product Number (please contact us)
X1G004561xxxx00
Specifications (characteristics)
Item
Output frequency range
Symbol
f0
Specifications
50 MHz to 800 MHz
Conditions / Remarks
It can be changed by I²C
Supply voltage
Storage temperature
V_CC
T_stg
D: 2.5 V ± 0.125 V, C: 3.3 V ± 0.33 V
-55 ºC to +125 ºC
Storage as single product
Operating temperature
Frequency tolerance *1
T_use
f_tol
-40 ºC to +85 ºC
±50 × 10^-6 Max.
Includes frequency aging (10 years)
Current consumption
Disable current
Absolute pull range
Control voltage tuning range
I_CC
I_dis
APR
Vc
90 mA Max.
40 mA Max.
70 mA Max.
±0 to ±180 x10^-6
±0 to ±180 x10^-6
0 to VCC
OE Active, L_ECL=50 Ω
OE Inactive, Output Standby: Hi-Z mode
OE Inactive, Output Standby: Fix mode
VC = 1.65 V ± 1.35 V (VCC = 3.3 V)
VC = 1.25 V ± 1.00 V (VCC = 2.5 V)
Frequency change polarity
-
Positive slope
0 to VCC
Symmetry
SYM
45 % to 55 %
At outputs crossing point
Output voltage
Output load condition
Input voltage
Rise time / Fall time
Start-up time
V_OH
V_OL
L_ECL
V_IH
V_IL
tr/tf
t_str
VCC-1.025 V Min.
VCC-1.62 V Max.
50 Ω
70% VCC Min.
30% VCC Max.
400 ps Max.
10 ms Max.
DC characteristics
Termination to V_CC - 2.0 V
OE, FSEL0, FSEL1, SDA and SCL
Between 20% and 80% of (V_OH-V_OL)
Time at minimum supply voltage to be 0 s
*1 Frequency tolerance includes initial frequency tolerance, temperature variation, supply voltage change, reflow drift and 10 years aging at +25 ºC.
Product name
(Standard form)
VG7050 ECN SM20xxxx C J G H P Z
①②
③ ④⑤ ⑥ ⑦⑧⑨
①Model
②Output (E: LV-PECL)
③Parameter Designator (VG7050ECN: SM20xxxx)
④Supply voltage (C: 3.3 V Typ., D: 2.5 V Typ.)
⑤Frequency tolerance (J: ±50 × 10^-6)
⑥Operating temperature (G: -40 ~ +85°C)
⑦OE Function (H: Active High, L: Active Low)
⑧Absolute Pull Range (P: Programmable)
⑨Output Standby Type (F: Fix (OUT=”L”, OUTN=”H”), Z: High-Z)
Phase Jitter
Offset Frequency 125.00 MHz 156.25 MHz 250.00 MHz 425.00 MHz 622.08 MHz 669.33 MHz 794.73 MHz
Phase jitter*2
Typ.
12 kHz to 20 MHz
20 kHz to 50 MHz
50 kHz to 80 MHz
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*2 In order to achieve optimum jitter performance, it is recommended that the capacitor (0.1 μF + 10 μF) between V_CC and GND pin should be placed as close to the V_CC pin
as possible.