S1S65010 Datasheet, PDF (1/14 Pages) Epson Company – Network Camera Controller with JPEG Encoder

S1S65010
Network Camera Controller with JPEG Encoder
„ DESCRIPTIONS
S1S65010 is an optimum network camera controller IC for configuring Internet cameras. In addition to network/protocol
process function, it also has camera interface and JPEG encoder function. Connecting a Flash ROM stored with a
camera module, PHY for Ethernet and firmware to the S1S65010 enables simple configuration of the Internet camera.
Image capturing from cameras and JPEG encoding is executed at the receipt of shutter command from a client. When
the S1S65010 is operated as an HTTP server on the LAN, it sends image files to the client upon request. Capturing
images and sending them to the designated client can be done full time, or at a constant frequency using internal timer,
or at a trigger on an interrupt pin using external sensors or other device. Images can be sent as an attachment to the
e-mail.
S1S65010, equipped with GPIO and I²C bus, can configure cameras and control external devices such as a motor via
these ports through the network. A sample software is supplied with this product.
„ FEATURES
z Enables the function of the internet camera without PC
z Compatible with S1S65000 pins. Software upper compatible with S1S65000.
z Realizes 30fps@VGA frame rate as a network camera.
z Works with a variety of camera modules up to 2 mega pixels (approx. 2 million pixels).
z Supports I²S for voice/audio data.
z Compresses images in JPEG format with hardware JPEG encoder (complies with ISO 10918)
z Can configure various control settings via the network
z Can send Images via e-mail
z Can save power consumption by using wake-up mode that changes status of start, shoot and pause on a regular
cycle.
z Has a Compact Flash interface for a CF memory card or a wireless LAN interface (802.11b/g).
z One-chip solution, which can reduce system cost.
z ARM720T Rev 4.3 is built-in (with 8KB cache) 50MHz
„ BUILT-IN FUNCTIONS
z CPU:
x 32Bit RISC ARM720T (50MHz)
x 32Bit-long codes and efficient 16bit-long codes
(Thumb Code) can be selected for use
x 31 general-purpose 32 bit registers
x A multiplier is included in the CPU.
z RAM:
x 78KB Embedded RAM for CPU/JPEG/Ethernet
Work
z Camera input/JPEG encoder:
x 8 bit parallel interface YUV4-2-2 input
x Resolution up to approx. 1600 × 1200 (UXGA,
SXGA, XGA, VGA, QVGA, CIF, QCIF)
x Supports ITU-R BT656 format
x Hardware JPEG encoder
x Max. 30 fps @VGA, 30 fps @CIF
x Maximum pixel clock frequency for camera data
input: less than 2/3 of CPU clock
z JPEG:
x Hardware JPEG encoder
x Resize function
x Dedicated Line Buffer
x Variable volume FIFO for JPEG encoder output
x An enhanced DMA
z Network:
x Ethernet Mac controller supporting 10/100 BASE
Full duplex and Half duplex mode
x Media Independent Interface (IEEE 802.3 Clause
22 compliant)
x An enhanced DMA
z External Memory Controller:
x 16 bit data bus
x Supports 2 to 128 MB SDRAM
x Supports static memory (Flash EEPROM/SRAM)
(Maximum capacity : 16MB)
x 3 Chip Select pins (Typically for SDRAM, Flash
ROM and another chip).
z CF Card Interface:
x CF+ Specification Rev.1.4 compliant.
x Usable as an interface for wireless LAN, PHS
card, etc
x Supports True IDE mode
z Standby function:
x The HALT function to stop the CPU clock when
CPU operation is not required.
x Programmable I/O clock stop function for major
I/O block clocks.
z Timer, Watchdog Timer:
x 16-Bit timer × 3 channels
x Re-load/Cyclic or One Shot Operation Mode
x Supports toggle outputs from timer underflow or
port outputs.
x Interrupt output or re-settable watchdog timer.
SEIKO EPSON CORPORATION