EPC635 Datasheet, PDF (85/97 Pages) Espros Photonics corp – 3D TOF Imager 160 x 60 Pixel

8.7.7. SEQ_Control
SEQ_Control
Bit No.
7
Bit name
reserved
Operation
0
Default
6
pixel_seq_
wait_row_
done_en
0
Mod./demod. registers, SEG1 *: Sequencer control
5
4
3
2
1
reserved
RW
0
0
0
0
1
0x03
0x91
0
1
pixel_seq_wait_row_
done_en:
If enabled, avoids readout rollover when using slower DCLKs e.g. DCLK < 10MHz with default ROI. Stretches
HSYNC for slower TCMI interface. Causes reduced DCS frame rate due to additional 2µs per ADC conversion
(tconv + 2µs).
0: disable for DCLK > 10MHz (default)
1: enable for DCLK = 10MHz or lower with default ROI
8.7.8. MOD_Control **
MOD_Control **
Bit No.
7
6
Bit name
mod_sel
Operation
0
0
Default
Mod./demod. registers, SEG1 *: Modulation select
5
4
3
2
1
dcs_sel
int_len
_mgx1_en
reserved
RW
1
1
0
1
0
0x34
0x92
0
0
mod_sel:
dcs_sel:
int_len_mgx1_en:
Modulation select
00: Sinusoidal mode
01: reserved
10: reserved
11: Grayscale mode
Number of DCS read-outs select
00: 1x DCSx: DCS0
01: 2x DCSx: DCS0, DCS1
10: reserved
11: 4x DCSx: DCS0, DCS1, DCS2, DCS4
Grayscale mode
Dual MGX mode
Single MGX mode
Note: dcs_sel must be set to 11 for Single-MGX, 01 for Dual-MGX sine mode, or 00 for grayscale mode
Int_Len_mgx1_hi/lo enable (refer to DUAL MGX mode – single DCS acquisition with different integration time)
0: disable
1: enable
Note: int_len_mgx1_en must be enabled only when dual_mgx_mode = 1,
otherwise it is not effective (see Figure 33)
8.7.9. Dist_offset **
Dist_offset **
Bit No.
7
6
Bit name
reserved
Operation
0
0
Default
Mod./demod. registers, SEG1 *: Distance offset
5
4
3
2
1
dist_offset
RW
0
0
0
0
0
0x00
0x93
0
0
dist_offset
Number of pll_clk period delays on the abd, abg, mga, mgb signals.
Note: It is effective in all modulation modes.
Therefore, it is recommended to set it to 0 for all modulation modes.
© 2017 ESPROS Photonics Corporation
Characteristics subject to change without notice
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