EM47DM1688SBC Datasheet, PDF (9/38 Pages) Eorex Corporation – JEDEC Standard VDD/VDDQ

EM47DM1688SBC
AC and DC Logic Input Levels for Differential Signals
Differential signals definition
Differential AC and DC Input Levels
Symbol Parameter
Min.
Max.
Units ^Note
VIHdiff
Differential input high
+0.2
See Note3
V
1
VILdiff
Differential input low
See Note3
-0.2
V
1
VIHdiff (AC) AC Differential input high
2x(VIH(AC)-VREF)
See Note3
V
2
VILdiff (AC) AC Differential input low
See Note3
2x(VIL(AC)-VREF)
V
2
Note1. It is used to define a differential signal slew-rate.
Note2. For CK - /CK use VIH/VIL(AC) of address/command and VREFCA; for strobes (DQS, DQS) use VIH/VIL(AC) of
DQs and VREFDQ; if a reduced ac-high or ac-low level is used for a signal group, then the reduced level applies
also here.
Note3. These values are not defined, however they single-ended signals CK, /CK, DQS, /DQS need to be
within the respective limits (VIH(DC) max, VIL(DC)min) for single-ended signals.
Jan. 2013
9/38
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