ESMMC64 Datasheet, PDF (7/8 Pages) Eorex Corporation – 64MB/128MB/256MB/512MB MultiMediaCard™

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Timing Diagram of Data Input and Output
The access time (t_AT) is divided into two parts:
T_SAD: The synchronous access time. This time defines the time of the
maximum number of cycles which are required to access a byte of the
memory field.
T_AAD: The synchronous access time to read a byte out of the memory field.
The synchronous part of the access time is sum of the command frame length
and some additional internal cycles (N_SAD = 16 cycles). At 20MHz one
cycle is 50ns (1/f_CLK), multiplied with N_SAD the resulting frame time is
T_SAD = 0.8µs. The asynchronous access delay T_AAD = 600µs maximum.
The resulting memory access time t_AT is the sum of both parts:
t_AT = T_SAD + T_AAD
with T_SAD = N_SAD/ f_CLK
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