ED382R517-2G4SA-H9R_15 Datasheet, PDF (33/51 Pages) Eorex Corporation – eorex Registered DDR3 SDRAM DIMMs

eorex
ED382R517-2G4SA-H9R
DDR3-1333 Speed Bins
For specific Notes See "Speed Bin Table Notes" on page 37.
Speed Bin
DDR3-1333H
CL - nRCD - nRP
Parameter
Symbol
Internal read
command to first data
t_AA
ACT to internal read or
write delay time
t_RCD
PRE command period ^t_RP
ACT to ACT or REF
command period
t_RC
ACT to PRE command
period
t_RAS
CL = 6
CWL = 5
CWL = 6
CWL = 7
CWL = 5
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
CL = 7 CWL = 6 t_CK(AVG)
CWL = 7
CWL = 5
CL = 8 CWL = 6
CWL = 7
CWL = 5, 6
CL = 9
CWL = 7
CWL = 5, 6
CL = 10
CWL = 7
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
t_CK(AVG)
Supported CL Settings
Supported CWL Settings
min
13.5
(13.125)^5,10
13.5
(13.125)^5,10
13.5
(13.125)^5,10
49.5
(49.125)^5,10
9-9-9
max
20
—
—
—
36
9 * tREFI
2.5
1.875
1.875
1.5
1.5
3.3
Reserved
Reserved
Reserved
< 2.5
(Optional)^5,10
Reserved
Reserved
< 2.5
Reserved
Reserved
<1.875
Reserved
<1.875
(Optional)
6, 7, 8, 9, 10
5, 6, 7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
n_CK
n_CK
Note
1,2,3,7
1,2,3,4,7
4
4
1,2,3,4,7
1,2,3,4
4
1,2,3,7
1,2,3,4
4
1,2,3,4
4
1,2,3
5
33
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