EM48AM1684VTG Datasheet, PDF (10/20 Pages) Eorex Corporation – 256Mb (4M×4Bank×16) Synchronous DRAM

EM48AM1684VTG
AC Operating Test Characteristics (Continued)
(V_DD=3.3V±0.3V, T_A=0°C ~70°C/T_A=-25°C ~ +85°C for extended grade)
Symbol
Parameter
-6
Min. Max..
ACTIVE to ACTIVE Command Period
t_RC
(Note 6)
60
-7
Min. Max.
65
Units
ns
ACTIVE to PRECHARGE Command
t_RAS
Period ^{(Note 6)}
PRECHARGE to ACTIVE Command
t_RP
Period ^{(Note 6)}
ACTIVE to READ/WRITE Delay Time
t_RCD
(Note 6)
42 100K 45 100K ns
18
20
ns
18
20
ns
ACTIVE(one) to ACTIVE(another)
t_RRD
Command ^{(Note 6)}
12
t_CCD
READ/WRITE Command to
READ/WRITE Command
1
15
ns
1
CLK
t_DPL
Date-in to PRECHARGE Command
2
2
CLK
t_BDL
Date-in to BURST Stop Command
1
Data-out to High
CL=3
3
t_ROH
Impedance from
PRECHARGE Command ^CL=2
2
t_SREX Self Refresh Exit Time
1
1
CLK
3
CLK
2
1
CLK
t_WR
Write Recovery Time, Auto precharge
2
2
CLK
t_DQW DQM Write Mask Latency
0
0
CLK
t_REF
Refresh Time (8,192 cycle)
64
64 ms
* All voltages referenced to V_SS.
Note 6: These parameters account for the number of clock cycles and depend on the operating
frequency of the clock, as follows:
The number of clock cycles = Specified value of timing/clock period (Count Fractions as a
whole number)
Jun. 2010
10/20
www.eorex.com