EM488M1644VTD Datasheet, PDF (1/18 Pages) Eorex Corporation – 128Mb (2Mx4Bankx16) Synchronous DRAM

EM488M1644VTD
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128Mb (2Mx4Bankx16) Synchronous DRAM
Feature
• Fully synchronous to positive clock edge
• Single 3.3V +/- 0.3V power supply
• LVTTL compatible with multiplexed address
• Programmable Burst Length (B/ L) - 1,2,4, 8
or full page
• Programmable CAS Latency (C/ L) - 2 or 3
• Data Mask (DQM) for Read / Write masking
• Programmable wrap sequence
– Sequential (B/ L = 1/2/4/8/full page )
– Interleave (B/ L = 1/2/4/8 )
• Burst read with single-bit write operation
• All inputs are sampled at the rising edge of
the system clock.
• Auto refresh and self refresh
• 4,096 refresh cycles / 64ms (15.625us)
Description
The EM488M1644VTD is Synchronous
Dynamic Random Access Memory (SDRAM)
organized as 2Meg words x 4 banks x 16
bits.All inputs and outputs are synchronized
with the positive edge of the clock.
The 128Mb SDRAM uses synchronized
pipelined architecture to achieve high
speed data transfer rates and is designed to
operate at 3.3V low power memory system.
It also provides auto refresh with power
saving / down mode. All inputs and outputs
voltage levels are compatible with LVTTL.
Packages: TSOPII 54P 400mil
Ordering Information
Part No
EM488M1644VTD –75F
EM488M1644VTD –7F
Organization Max. Freq
8M X16 133MHz @CL3
8M X16 143MHz @CL3
Package
Power
54pin TSOP (II) Commercial
54pin TSOP (II) Commercial
Pb
Free
Free
* EOREX reserves the right to change products or specification without notice.
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