EN29PL032A Datasheet, PDF (33/52 Pages) Eon Silicon Solution Inc. – 32 Mbit (2 M x 16-Bit) CMOS 3.0 Volt- only, Simultaneous-Read/Write Flash Memory

Figure 16.1 Data# Polling Algorithm
EN29PL032A
Notes
1. VA = Valid address for programming. During a sector erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5.
16.2 RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the
command sequence. Since RY/BY# is an open-drain output, several RY/BY# pins can be tied together
in parallel with a pull-up resistor to V_CC.
If the output is low (Busy), the device is actively erasing or programming. (This includes programming in
the Erase Suspend mode.) If the output is high (Ready), the device is in the read mode, the standby
mode, or one of the banks is in the erase-suspend-read mode.
Table 16.1 shows the outputs for RY/BY#.
16.3 DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any
address, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address
cause DQ6 to toggle. The system may use either OE# or CE# to control the read cycles. When the
operation is complete, DQ6 stops toggling.
This Data Sheet may be revised by subsequent versions ₃₃
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. B, Issue Date: 2010/12/27
www.eonssi.com