EN29PL064-70TI Datasheet, PDF (1/66 Pages) Eon Silicon Solution Inc. – 64/32 Mbit (4/2 M x 16-Bit) CMOS 3.0 Volt- only,

EN29PL064/032
EN29PL064/032
64/32 Mbit (4/2 M x 16-Bit) CMOS 3.0 Volt- only,
Simultaneous-Read/Write Flash Memory
Distinctive Characteristics
Architectural Advantages
• 64/32 Mbit Page Mode devices
- Page size of 4 words: Fast page read access
from random locations within the page
• Single power supply operation
- Voltage range of 2.7V to 3.3V valid for MCP
product
- Single Voltage, 2.7V to 3.6V for Read and Write
operations
• Simultaneous Read/Write Operation
- Data can be continuously read from one bank
while executing erase/ program functions in
another bank
- Zero latency switching from write to read
operations
• FlexBank Architecture( PL064/PL032)
- 4 separate banks, with up to two simultaneous
operations per device
- Bank A:
PL064 - 8 Mbit (4 Kw x 8 and 32 Kw x 15)
PL032 - 4 Mbit (4 Kw x 8 and 32 Kw x 7)
- Bank B:
PL064 - 24 Mbit (32 Kw x 48)
PL032 - 12 Mbit (32 Kw x 24)
- Bank C:
PL064 - 24 Mbit (32 Kw x 48)
PL032 - 12 Mbit (32 Kw x 24)
- Bank D:
PL064 - 8 Mbit (4 Kw x 8 and 32 Kw x 15)
PL032 - 4 Mbit (4 Kw x 8 and 32 Kw x 7)
• Secured Silicon Sector region
- Up to 64 customer-lockable words
• Both top and bottom boot blocks in one device
• Data Retention: 20 years typical
• Cycling Endurance: 100K cycles per sector
typical
Performance Characteristics
• High Performance
- Page access times as fast as 25 ns
- Random access times as fast as 70 ns
- 32-word/64-byte write buffer reduces overall
programming time for multiple-word updates
• Power consumption (typical values at 10 MHz)
- 45 mA active read current
- 17 mA program/erase current
- 0.2 µA typical standby mode current
Software Features
• Software command-set compatible with
JEDEC 42.4 standard
• CFI (Common Flash Interface) compliant
- Provides device-specific information to the
system, allowing host software to easily
reconfigure for different Flash devices
• Erase Suspend / Erase Resume
- Suspends an erase operation to allow read or
program operations in other sectors of same
bank
• Program Suspend / Program Resume
- Suspends a program operation to allow read
operation from sectors other than the one
being programmed
• Unlock Bypass Program command
- Reduces overall programming time when
issuing multiple program command
sequences
Hardware Features
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting
program or erase cycle completion
• Hardware reset pin (RESET#)
- Hardware method to reset the device to reading
array data
• WP#/ ACC (Write Protect/Acceleration) input
- At V_IL, hardware level protection for the first and
last two 4K word sectors.
- At V_IH, allows removal of sector protection
- At V_HH, provides accelerated programming in a
factory setting
• Persistent Sector Protection
- A command sector protection method to lock
combinations of individual sectors and sector
groups to prevent program or erase operations
within that sector
- Sectors can be locked and unlocked in-system at
V_CC level
• Package options
- 56-ball Fine Pitch BGA
- 48-ball Fine pitch BGA
- 48-pin TSOP-1
This Data Sheet may be revised by subsequent versions ₁
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. D, Issue Date: 2008/03/27