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EP5368QI Datasheet, PDF (2/12 Pages) Enpirion, Inc. – 600mA Synchronous Buck Regulator With Integrated Inductor
April 2008
EP5368QI
Pin Description
Figure 2. EP5368QI Package Pin-out.
NC (Pins 1,3,9,15,16): These pins should not
be electrically connected to each other or to
any external signal, voltage, or ground. One or
more of these pins may be connected
internally.
PGND: (Pin 2): Power ground.
VFB (Pin 4): Feed back pin for external divider
option. When using the external divider option
(VS0=VS1=VS2= high) connect this pin to the
center of the external divider. Set the divider
such that VFB = 0.6V. The “ground” side of the
external divider should be connected to AGND.
VSENSE (Pin 5): Sense pin for preset output
voltages. When using preset voltages connect
this to VLOAD or as close to VLOAD as possible to
ensure the best regulation. When using
external divider, connect this pin to VOUT.
AGND: (Pin 6):Analog ground. This is the
quiet ground for the internal control circuitry
VOUT (Pin 7,8): Regulated output voltage.
VS0,VS1,VS2 (Pin 10, 11, 12): Output voltage
select. VS2=pin10 VS1=pin11, VS0=pin12.
Selects one of seven preset output voltages or
choose external divider by connecting pins to
logic high or low. Logic low is defined as VLOW
≤ 0.4V. Logic high is defined as VHIGH ≥ 1.4V.
Any level between these two values is
indeterminate. (refer to section on output
voltage select for more detail).
ENABLE (Pin 13): Output enable. Enable =
logic high, disable = logic low. Logic low is
defined as VLOW ≤ 0.4V. Logic high is defined
as VHIGH ≥ 1.4V. Any level between these two
values is indeterminate.
VIN (Pin 14): Input voltage pin. Supplies power
to the IC. VIN can range from 2.4V to 5.5V.
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