EP53A8LQI Datasheet, PDF (11/14 Pages) Enpirion, Inc. – 1000mA Synchronous Buck Regulator with Integrated Inductor

Output Voltage Programming
The EP53A8xQI utilizes a 3-pin VID to program
the output voltage value. The VID is available
in two sets of output VID programming ranges.
The VID pins should be connected either to an
external control signal, AVIN or to AGND to
avoid noise coupling into the device.
The “Low” range is optimized for low voltage
applications. It comes with preset VID settings
ranging from 0.80V and 1.5V. This VID set
also has an external divider option.
To specify this VID range, order part number
EP53A8LQI.
The “High” VID set provides output voltage
settings ranging from 1.8V to 3.3V. This
version does not have an external divider
option. To specify this VID range, order part
number EP53A8HQI.
Internally, the output of the VID multiplexer
sets the value for the voltage reference DAC,
which in turn is connected to the non-inverting
input of the error amplifier. This allows the use
of a single feedback divider with constant loop
gain and optimum compensation, independent
of the output voltage selected.
NOTE: The VID pins must not be left floating.
Table 1: EP53A8LQI VID Voltage Select Settings
VS2
VS1
VS0
VOUT
0
0
0
1.50
0
0
1
1.45
0
1
0
1.20
0
1
1
1.15
1
0
0
1.10
1
0
1
1.05
1
1
0
0.8
1
1
1
EXT
EP53A8L Low VID Range Programming
The EP53A8LQI is designed to provide a high
degree of flexibility in powering applications
that require low V_OUT settings and dynamic
voltage scaling (DVS). The device employs a
3-pin VID architecture that allows the user to
choose one of seven (7) preset output voltage
settings, or the user can select an external
EP53A8LQI/EP53A8HQI
voltage divider option. The VID pin settings
can be changed on the fly to implement glitch-
free voltage scaling.
Table 1 shows the VS2-VS0 pin logic states for
the EP53A8LQI and the associated output
voltage levels. A logic “1” indicates a
connection to AVIN or to a “high” logic voltage
level. A logic “0” indicates a connection to
AGND or to a “low” logic voltage level. These
pins can be either hardwired to AVIN or AGND
or alternatively can be driven by standard logic
levels. Logic levels are defined in the electrical
characteristics table. Any level between the
logic high and logic low is indeterminate.
EP53A8LQI External Voltage Divider
The external divider option is chosen by
connecting VID pins VS2-VS0 to V_IN or a logic
“1” or “high”. The EP53A8LQI uses a separate
feedback pin, V_FB, when using the external
divider. V_SENSE must be connected to V_OUT as
indicated in Figure 8.
The output voltage is selected by the following
formula:
( ) V_OUT
= 0.6V
1+
Ra
Rb
100 Ohms
V_IN
4.7uF
0603
PVIN
VSense
VOUT
AVIN
Ra
ENABLE
VS0
VS1
VFB
Rb
VS2 _{PGND AGND}
V_OUT
10µF
0805
Figure 8: EP53A8LQI using external divider
R_a must be chosen as 237KΩ to maintain loop
gain. Then R_b is given as:
R = 142.2x103 Ω
b _{VOUT − 0.6}
V_OUT can be programmed over the range of
0.6V to (V_IN – 0.5V).
NOTE: Dynamic Voltage Scaling is not allowed
between internal preset voltages and external
divider.
©Enpirion 2009 all rights reserved, E&OE
03651
11
12/16/2009
www.enpirion.com
Rev:B