EN6347QI Datasheet, PDF (11/16 Pages) Enpirion, Inc. – 4A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor

Thermal Overload Protection
Thermal shutdown circuit will disable device
operation when the Junction temperature
exceeds approximately 150ºC. After a thermal
shutdown event, when the junction
temperature drops by approx 20ºC, the
converter will re-start with a normal soft-start.
Input Under-Voltage Lock-Out
Internal circuits ensure that the converter will
not start switching until the input voltage is
above the specified minimum voltage.
Hysteresis and input de-glitch circuits ensure
high noise immunity and prevent false UVLO
triggers.
Application Information
The EN6347QI output voltage is programmed
using a simple resistor divider network. Figure
6 shows the resistor divider configuration.
RA 200 k :
RB
0 .75 * RA
(VOUT  0 .75 V )
Figure 6: V_OUT Resistor Divider &
Compensation Capacitor
An additional compensation capacitor C_A is
also required in parallel with the upper resistor.
Input Capacitor Selection
The EN6347QI requires about 20uF of input
capacitance. Low-cost, low-ESR ceramic
capacitors should be used as input capacitors
for this converter. The dielectric must be X5R
or X7R rated. Y5V or equivalent dielectric
formulations must not be used as these lose
too much capacitance with frequency,
temperature and bias voltage. In some
applications, lower value capacitors are
needed in parallel with the larger, capacitors in
order to provide high frequency decoupling.
EN6347QI
Compensation
The EN6347QI uses a type 3 compensation
network. As noted earlier, a piece of the
compensation network is the phase lead
capacitor CA in Figure 6. This network is
optimized for use with about 50-100ȝF of
output capacitance and will provide wide loop
bandwidth and excellent transient performance
for most applications. Voltage mode operation
provides high noise immunity at light load.
In some applications modifications to the
compensation may be required. For more
information, contact Enpirion Applications
Engineering support.
Recommended Input Capacitors
Description
10µF, 10V, 10%
X7R, 1206
(2 capacitors needed)
22µF, 10V, 20%
X5R, 1206
(1 capacitor needed)
MFG
Murata
Taiyo Yuden
Murata
Taiyo Yuden
P/N
GRM31CR71A106KA01L
LMK316B7106KL-T
GRM31CR61A226ME19L
LMK316BJ226ML-T
Output Capacitor Selection
The EN6347QI has been nominally optimized
for use with approximately 50-100ȝF of output
capacitance. Low ESR ceramic capacitors are
required with X5R or X7R rated dielectric
formulation. Y5V or equivalent dielectric
formulations must not be used as these lose
too much capacitance with frequency,
temperature and bias voltage.
Output ripple voltage is determined by the
aggregate output capacitor impedance. Output
impedance, denoted as Z, is comprised of
effective series resistance, ESR, and effective
series inductance, ESL:
Z = ESR + ESL
Placing output capacitors in parallel reduces
the impedance and will hence result in lower
PWM ripple voltage. In addition, higher output
capacitance will improve overall regulation and
ripple in light-load mode.
1
Z
Total
11
1
  ... 
ZZ
Z
1
2
n
¤Enpirion 2011 all rights reserved, E&OE
05991
11
10/04/2011
www.enpirion.com
Rev: B